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PDF M62353P Data sheet ( Hoja de datos )

Número de pieza M62353P
Descripción 8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
Fabricantes Mitsubishi 
Logotipo Mitsubishi Logotipo



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MITSUBISHI<Dig.Ana.INTERFACE>
M62353P,FP,GP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
DESCRIPTION
The M62353 is an integrated circuit semiconductor of CMOS
structure with 8 channels of built-in D-A converters with output
buffer operational amplifiers.
The 3-wire serial interface method is used for the transfer
format mum wiring.
It is able to cascading serial use with Do terminal.
The output buffer operational amplifier operates in the whole
voltage range from power supply to ground for both
input/output.
FEATURES
•12bit serial data input(3-wire serial data transfer method)
•Highly stable output buffer operational amplifier allow operation
in the all voltage range from power supply to ground.
PIN CONFIGURATION (TOP VIEW)
Vss
(VrefL) 1
Ao2 2
Ao3 3
Ao4 4
Ao5 5
Ao6 6
Ao7 7
VDD 8
(VrefU)
16 GND
15 Ao1
14 DI
13 CLK
12 LD
11 DO
10 Ao8
9 Vcc
APPLICATION
Adjustment/control of industrial or home-use electronic
equipment,such as VTR camera,VTR set,TV,and CRT
display.
Outline 16P4(P)
16P2N-A(FP)
16P2E-A(GP)
BLOCK DIAGRAM
GND
Ao1
DI
16 15 14
CLK LD
13 12
Do Ao8
11 10
Vcc
9
-
8-BIT
R-2R D-A
Ch1
8-BIT
LATCH
.....
(8)
12-BIT SHIFT REGISTER
D0 1 2 3 4 5 6 D7
D8 9 10 D11
ADDRESS
(8) DECODER
....
(8)
-
D-A
8
L
(8)
8-BIT
LATCH
Ch2
8-BIT
R-2R D-A
BUFFER
OP AMP
1
Vss
(VrefL)
-
2
Ao2
L
3
D-A
-
3
Ao3
L
4
D-A
-
L
5
D-A
-
L
6
D-A
-
4 56
Ao4 Ao5 Ao6
MITSUBISHI
ELECTRIC
L
7
D-A
-
7
Ao7
8
VDD
(VrefU)
( 1/6)

1 page




M62353P pdf
MITSUBISHI<Dig.Ana.INTERFACE>
M62353P,FP,GP
8-BIT 8CH D-A CONVERTER WITH BUFFER AMPLIFIERS
AC CHARACTERISTICS(Vcc,VrefU=+5V±10%,VccVrefU,GND,VrefL=0V,Ta=-20~+85°C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Min Typ Max
tCLK Clock "L"pulse width
200
tCKH Clock "H"pulse width
200
tCR Clock rise time
200
tCF Clock fall time
200
tDCH
Data setup time
30
tCHD
Data hold time
60
tCHL LD setup time
200
tLDC LD hold time
100
tLDH LD "H" pulse width
100
tDO Data output delay time
CL100pF
70 350
tLDD D-A output setting time
CL100pF VAQ:0.5 4.5V
The time until the output becomes the
final value of 1/2 LSB
300
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
TIMING CHART
CLK
tCR tCKH tCF
tCKL
DI
LD
D-A
OUTPUT
DO
OUTPUT
tDCH tCHD
tCHL
tDO
tLDH
tLDC
tLDD
MITSUBISHI
ELECTRIC
( 5/6)

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