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PDF M62281FP Data sheet ( Hoja de datos )

Número de pieza M62281FP
Descripción GENERAL PURPOSE CURRENT MODE PWM CONTROL IC
Fabricantes Mitsubishi 
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MITSUBISHI SEMICONDUCTOR < STANDERD LINEAR IC >
M62M2682218P1P/F/FPP
GENERALGEPNUERRPAOL PSUERCPOUSRERCEUNRTREMNOTDMEODPEWPMWMCOCONNTTRROOL IICC
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
M62281P/FP is designed as a high speed current mode
PWM control IC.
This small10 pin package contains many functions and
protection circuits allowing simpler peripheral circuit and
compact set design.
This IC can operate high speed switching (700kHz max.)
with high speed current sense comparator and current
limiting circuit.
FEATURES
700kHz applicable to MOS-FET
VOUT 1
GND 2
CLM 3
CURRENT
SENSE
4
CF 5
10 Vcc
9 EA IN
8 EA OUT
7 CT
6 SOFT
• Output current Io(peak) = ±1A
• Totem pole output
CURRENT SENSE terminal separate form CLM terminal makes
OUTLINE 10P2N-A
VOUT 1
14 COLLECT
SMPS strong in noise.
High speed pulse-by-pulse current limiting
Timer type latch protection circuit with OVP(external reset is possible)
EMIT 2
GND 3
13 Vcc
12 EA IN
Soft start operation is possible (with dead time control)
Built-in OPAmp for feedback control (photo coupler can be driven)
Small start-up current 180µA
Start-up voltage 12.5V, Stop voltage 8.3V
CLM 4
CURRENT
SENSE
5
CF 6
11 EA OUT
10 CT
9 SOFT
APPLICATION
• Switching Regulator
• DC-DC converter
N.C 7
8 N.C
OUTLINE 14P4
Vcc CLM
CT
(OVP)
UVLO
TIMER
LATCH
EA IN
2.5V
CLM
COMP
0.2V
CS
COMP
S
CLM
LATCH
R
R
PWM
LATCH
S
OSC.
:note
COLLECT
VOUT
:note
EMIT
GND
EA SOFT CURRENT CF
OUT DUTY SENSE
SET-UP
note: GND terminal is connected to emitter terminal
as M62281FP in IC inside.
And Vcc terminal is connected to collector
terminal as M62281FP in IC inside.
(1/9)

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M62281FP pdf
MITSUBISHI SEMICONDUCTOR < STANDERD LINEAR IC >
M62281P/FP
GENERAL PURPOSE CURRENT MODE PWM CONTROL IC
In Fig. 3-1, AC gain is represented as:
| Av | = | RF/ RIN |
Proper gain setting is about 40dB.
RF should be 52Kor more due to the current source capability of error amp.
R1, R2 should meet the condition as below so that the voltage of EAIN terminal should not be over 5V.
R2 * Vcc/ (R1 + R2) 5V
Due to the input impedance of EAIN terminal, the current in R1, R2 should be less than several mA.
(2) CT(OVP) TERMINAL
Timer type latch circuit works as follows.
Constant charge current flows out from CT terminal to the external capacitor when CLM is operative.
When the voltage of CT terminal rises up to over 4.0V(typ.), the latch circuit operates to make
functions of this IC inoperative. Inoperative status is sustained until supply voltage becomes less than
stop voltage. The value for start-up register has to be set so that the current over 1.8mA(typ.) can flow
the resistor because the stop status has to be kept by the current in start-up resistor R1 shown in
application circuit.
When timer latch circuit is operative, supply current increases at high voltage as shown in Fig.4 to
avoid the damage caused by unnecessarily increased supply voltage.
Inoperative status goes back to operation by forcibly decreasing the voltage of CT terminal to less
than 0.7V.
3.0
2.5 Latch reset
8.3V
2.0
1.5
1.0
0.5
0 5 10 15 20 25 30 35
Supply voltage : Vcc (V)
Fig.4 Supply current/voltage chracteristics (at timer latch)
(5/9)

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