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PDF M61140FP Data sheet ( Hoja de datos )
| Número de pieza | M61140FP | |
| Descripción | TUNER SINGLE CHIP | |
| Fabricantes | Hitachi | |
| Logotipo |  |
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M61140FP
TUNER SINGLE CHIP
REJ03F0023-0120Z
Rev.1.2
Apr.16.2004
Description
The M61140FP is a semiconductor integrated circuit consisting of Tuner signal processing for NTSC color TV and
VCRs.
The circuit includes Mixer circuit in Tuning system, Oscillator circuit, PLL frequency synthesizer and VIF/SIF, which
permits a smaller tuner system.
Features
• VIF/SIF
Inter carrier type for NTSC
Coil-less VCO
Adjustment free AFT
High-speed IF AGC
• PLL
Low phase noise and High-speed lock-up
Built-in band switch driver (4 port)
I2C bus control
Available for both XO and external reference
• Mixer/Oscillator
Built-in U&V Oscillator and mixer
Built-in IF Amplifier (Unbalanced Output)
Application
TV, VCR
Recommended Operating Conditions
Supply voltage range --- 4.75 to 5.25V
Recommended supply voltage --- 5.0V
Rev.1.2, Apr.16.2004, page 1 of 28
1 page  
M61140FP
Pin No. Pin name
5 EQ F/B
Function
Equalizer feedback terminal. It is
possible to change the
frequency characteristic of the
video signal by attaching L,C,R
to this terminal.
Circuit Diagram
33
500
5
7K
2 .2K
6 OSC GND
OSC ground terminal.
7 V OSC IN 1 VHF oscillator circuit is
8
V OSC OUT 1
connected externally. When
24
9
V OSC OUT 2
band byte bit PUHF is set "1",
10 V OSC IN 2
bias current of oscillator
transistor turns OFF.
9
10
600
64000 400
7
8
11 U OSC 1
12 U OSC 2
UHF oscillator circuit is
connected externally. When
band byte bit PUHF is set "1",
bias current of oscillator
transistor turns ON.
36
400
11
2.5p
3p
400
3p
12
2.5p
13 U BAND
IN 1
14 U BAND
IN 2
UHF RF input terminal. Input
type is balance input. In the case
of unbalance input, grounding of
either pin 13 or 14 with capacitor
is required, while input to the
other pin.
24
13
14
1 .8K
1 .8K
Rev.1.2, Apr.16.2004, page 5 of 28
5 Page 
M61140FP
Pin No. Pin name
48 EQ IN
Function
The video signal threw the SIF
trap is input to this terminal. DC
impression from pin 1 is required
for the input to 48 pins.
Circuit Diagram
33
100
48
Setting Data
M61140FP's bus format is based on Philips's I2C-bus.
Bidirectional bus communication control can be performed. It consists of WRITE mode which receives various data,
and READ mode which transmits data. Recognition in WRITE mode and READ mode is performed by specification of
the last bit on Address Byte (R/W bit). When the setup of a R/W bit is "0", it is set as WRITE mode and, in the case of
"1", is set as READ mode. Furthermore, it has the address in which four programs are possible.
It enables this to use two or more devices on the same I2C bus.
Moreover, four programmable addresses are possible. Therefore, two or more devices become usable on I2C bus.
A setup of an address is chosen by the voltage impressed to an address setting terminal (ADS:25 pin).
If the address Byte in agreement is received, a data line will be set to "L" between knowledge, and at the time of
WRITE mode, if Data Byte is received, SDA line between knowledge will be set to "L."
It shows a definition of bus protocol admitted in the following.
Mode_1 STA CA DB1 DB2 CB1 CB2 STO
Mode_2 STA CA CB1 CB2 DB1 DB2 STO
Mode_3 STA CA DB1 DB2 STO
Mode_4 STA CA CB1 CB2 STO
STA : Start condition
STO : Stop condition
CA : Chip address
DB1 : Divider data byte 1
DB2 : Divider data byte 2
CB1 : Control data byte 1
CB2 : Band data byte 2
Rev.1.2, Apr.16.2004, page 11 of 28
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet M61140FP.PDF ] | |
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