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PDF M5M5W416CWG-85HI Data sheet ( Hoja de datos )

Número de pieza M5M5W416CWG-85HI
Descripción 4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
Fabricantes Mitsubishi 
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2000.11.22 Ver. 1.0
MITSUBISHI LSIs
M5M5W416CWG -85HI
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
Those are summarized in the part name table below.
DESCRIPTION
FEATURES
The M5M5W416C is a f amily of low v oltage 4-Mbit static RAMs - Single 1.65~2.3V power supply
organized as 262144-words by 16-bit, f abricated by Mitsubishi's - Small stand-by current: 0.2µA (2.0V, ty p.)
high-perf ormance 0.18µm CMOS technology .
- No clocks, No ref resh
The M5M5W416C is suitable f or memory applications where a - Data retention supply v oltage =1.5V
simple interf acing , battery operating and battery backup are the - All inputs and outputs are TTL compatible.
important design objectiv es.
- Easy memory expansion by S1, S2, BC1 and BC2
M5M5W416CWG is packaged in a CSP (chip scale package), - Common Data I/O
with the outline of 7.0mm x 8.5mm, ball matrix of 6 x 8 (48ball) - Three-state outputs: OR-tie capability
and ball pitch of 0.75mm. It giv es the best solution f or
- OE prev ents data contention in the I/O bus
a compaction
- Process technology : 0.18µm CMOS
of mounting area as well as f lexibility of wiring pattern of printed - Package: 48ball 7.0mm x 8.5mm CSP
circuit boards.
Version,
Operating
temperature
Part name
Power Access time
Supply
max.
I-version M5M5W416CWG -85HI 1.65 ~ 2.3V
-40 ~ +85°C
85ns
Stand-by c urrent
* Ty pical
Ratings (max.)
25°C 40°C 25°C 40°C 70°C 85°C
0.2 0.4 1 2 8 15
Activ e
current
Icc1
(2.3V, max)
30mA
(10MHz)
3mA
(1MHz)
PIN CONFIGURATION
(TOP VIEW)
* Typical parameter indicates the value for the center
of distribution at 2.0V, and not 100% tested.
1 23 456
A BC1 OE A0 A1 A2 S2
B DQ16 BC2 A3 A4 S1 DQ1
C DQ14 DQ15 A5
A6 DQ2 DQ3
D GND DQ13 A17 A7 DQ4 VCC
E VCC DQ12 GND A16 DQ5 GND
F DQ11 DQ10 A14 A15 DQ7 DQ6
G DQ9 N.C. A12 A13 W DQ8
H N C A8
A9 A10 A11 N.C.
Pin Function
A0 ~ A17 Address input
DQ1 ~ DQ16 Data input / output
S1 Chip select input 1
S2 Chip select input 2
W
OE
BC1
BC2
Write control input
Output enable input
Lower By te (DQ1 ~ 8)
Upper By te (DQ9 ~ 16)
Vcc Power supply
GND Ground supply
Outline: 48FJA
NC: No Connection
MITSUBISHI ELECTRIC
1

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M5M5W416CWG-85HI pdf
2000.11.22 Ver. 1.0
MITSUBISHI LSIs
M5M5W416CWG -85HI
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
(4)TIMING DIAGRAMS
Read cycle
tCR
A 0~18
ta(A)
tv (A)
BC1 ,BC2
(Note3)
ta(BC1) or ta(BC2)
tdis (BC1) or tdis (BC1)
(Note3)
S1
(Note3)
ta(S1)
tdis (S1)
(Note3)
S2
(Note3)
OE
W = "H" lev el
(Note3)
DQ1~16
Write cycle ( W control mode )
ta(S2)
ta (OE)
ten (OE)
ten (BC1)
ten (BC2)
ten (S1)
ten (S2)
tCW
tdis (S2)
tdis (OE)
VALID DATA
(Note3)
(Note3)
A 0~18
BC1,BC2
S1
S2
(Note3)
(Note3)
(Note3)
tsu (BC1) or tsu(BC2)
tsu (S1)
tsu (S2)
(Note3)
(Note3)
(Note3)
OE
W
DQ1~16
tsu (A)
tsu (A-WH)
tw (W)
tdis (W)
tdis(OE)
DATA IN
STABLE
tsu (D) th (D)
trec (W)
ten(OE)
ten (W)
MITSUBISHI ELECTRIC
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