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Número de pieza | M58CR032D85ZB6T | |
Descripción | 32 Mbit (2Mb x 16 / Dual Bank / Burst ) 1.8V Supply Flash Memory | |
Fabricantes | ST Microelectronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de M58CR032D85ZB6T (archivo pdf) en la parte inferior de esta página. Total 63 Páginas | ||
No Preview Available ! M58CR032C
M58CR032D
32 Mbit (2Mb x 16, Dual Bank, Burst )
1.8V Supply Flash Memory
PRELIMINARY DATA
FEATURES SUMMARY
s SUPPLY VOLTAGE
– VDD = 1.65V to 2V for Program, Erase and
Read
– VDDQ = 1.65V to 3.3V for I/O Buffers
– VPP = 12V for fast Program (optional)
s SYNCHRONOUS / ASYNCHRONOUS READ
– Burst mode Read: 54MHz
– Page mode Read (4 Words Page)
– Random Access: 85, 100, 120 ns
s PROGRAMMING TIME
– 10µs by Word typical
– Double/Quadruple Word programming option
s MEMORY BLOCKS
– Dual Bank Memory Array: 8/24 Mbit
– Parameter Blocks (Top or Bottom location)
s DUAL OPERATIONS
– Read in one Bank while Program or Erase in
other
– No delay between Read and Write operations
s BLOCK LOCKING
– All blocks locked at Power up
– Any combination of blocks can be locked
– WP for Block Lock-Down
s SECURITY
– 64 bit user programmable OTP cells
– 64 bit unique device identifier
– One parameter block permanently lockable
s COMMON FLASH INTERFACE (CFI)
s 100,000 PROGRAM/ERASE CYCLES per
BLOCK
Figure 1. Packages
FBGA
TFBGA56 (ZB)
6.5 x 10 mm
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M58CR032C: 88C8h
– Bottom Device Code, M58CR032D: 88C9h
September 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/63
1 page M58CR032C, M58CR032D
Table 34. Burst Read Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 35. Security Code Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
APPENDIX B. FLOWCHARTS AND PSEUDO CODES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 18. Program Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 19. Double Word Program Flowchart and Pseudo code . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 20. Quadruple Word Program Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 21. Program Suspend & Resume Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . 56
Figure 22. Block Erase Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 23. Erase Suspend & Resume Flowchart and Pseudo Code. . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 24. Locking Operations Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 25. Protection Register Program Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . 60
APPENDIX C. COMMAND INTERFACE STATE TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 36. Command Interface States - Lock table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 37. Command Interface States - Modify Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
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5 Page M58CR032C, M58CR032D
while VPP > VPP1 enables these functions (see Ta-
ble 19, DC Characteristics for the relevant values).
VPP is only sampled at the beginning of a program
or erase; a change in its value after the operation
has started does not have any effect on Program
or Erase, however for Double or Quadruple Word
Program the results are uncertain.
If VPP is in the range 11.4V to 12.6V it acts as a
power supply pin. In this condition VPP must be
stable until the Program/Erase algorithm is com-
pleted (see Table 16 and 17). In read mode the
current sunk is less then 0.5mA, while during pro-
gram and erase operations the current may in-
crease up to 10mA.
VSS and VSSQ Grounds. VSS and VSSQ grounds
are the reference for the core supply and the input/
output voltage measurements respectively.
Note: Each device in a system should have
VDD, VDDQ and VPP decoupled with a 0.1µF ca-
pacitor close to the pin. See Figure 10, AC Mea-
surement Load Circuit. The PCB trace widths
should be sufficient to carry the required VPP
program and erase currents.
11/63
11 Page |
Páginas | Total 63 Páginas | |
PDF Descargar | [ Datasheet M58CR032D85ZB6T.PDF ] |
Número de pieza | Descripción | Fabricantes |
M58CR032D85ZB6T | 32 Mbit (2Mb x 16 / Dual Bank / Burst ) 1.8V Supply Flash Memory | ST Microelectronics |
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