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PDF M58653P Data sheet ( Hoja de datos )

Número de pieza M58653P
Descripción 700-BIT ELECTRICALLY ALTERABLE ROM
Fabricantes Mitsubishi 
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~
MITSUBISHI LSls
M58653P
~V ~ U 700-BIT (SO-WORD BY 14-BIT) ELECTRICALLY ALTERABLE ROM
DESCRIPTION
The M58653P is a serial input/output 700 bit electrically
erasable and reprogrammable ROM organized as 50 words
of 14 bits, and fabricated using MNOS technology. Data
and addresses are transferred serially via a one-bit bidirec-
tional bus.
FEATURES
• Word-by-word electrically alterable
• Non-volatile data storage ......... 10 years (min)
• Write/erase time ..... _......... 20ms/word
• Typical power supply voltages ....... -30V, +5V
• Number of erase-write cycles ....... 105 times (min)
• Number of read access unrefreshed... 10· times (min)
• 5V I/O interface
PIN CONFIGURATION (TOP VIEW)
(5V) Vss
(~30V) Vaa
NC
NC
NC
CLOCK INPUT CLK_
MODE CONTROL C l -
INPUT
VM(NC)
VGND(OV)
DATA INPUT/
OUTPUT
NC
NC
-C3
-C2
} MODE CONTRO
INPUTS
APPLICATION
• Non-volatile channel memories for electronic tuning
systems and field-reprogrammable read-only memory
systems
Outline 14P4
NC NO CONNECTION
FUNCTION
The address is designated by two consecutive one-of-ten-
coded digits. Seven modes-accept address, accept data,
shift data output, erase, write, read, and standby-are
all selected by a 3-bit code applied to C1, C2 , and C3 . Data
is stored by internal negative writing pulses that selec-
tively tunnel charges into the Si02-Si3N. interface of the
gate insulators of the MNOS memory transistors.
BLOCK DIAGRAM
------ -----,
1 Vss(5V)
2 VGG(~30V)
CC2l] MODE CONTROL INPUTS
C3
6 CLK CLOCK INPUT
• MITSUBISHI
"ELECTRIC
7-3

1 page




M58653P pdf
MITSUBISHI LSls
M58653P
700·BIT (so. WORD BY 14.BIT) ELECTRICALLY ALTERABLE ROM
• The difinition of clock duty cvcle, 0 (I/»
TIL)
:1
• Timing of data input and mode control inputs
Mode control inputs, C1 , C2 , C3 and input signal my
change, when clock is 'H' level.
CLOCK
INPUT
(AOORESS/DATA)
• Timing of data output
CONTROL LINES
STABLE
ADDRESS DR DATA
STABLE
CLOCK
0,
02
03
DATA
(OUTPUT)
n
n
n
The 1st bit of output data is output after access ti me of
t.(C) frpm the mode control transition. And other bits are
output after t.(C) from positive edge of clock.
• MITSUBISHI
.... ELECTRIC
7-7

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