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PDF M54HCT541 Data sheet ( Hoja de datos )
| Número de pieza | M54HCT541 | |
| Descripción | OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT540: INVERTED - HCT541 NON INVERTED | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M54HCT541 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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M54HCT540/541
M74HCT540/541
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS
HCT540: INVERTED - HCT541 NON INVERTED
. HIGH SPEED
tPD = 10 ns (TYP.) at VCC = 5V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 oC
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX.)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS540/541
DESCRIPTION
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
C1R
(Micro Package)
(Chip Carrier)
ORDER CODES :
M54HCTXXXF1R M74HCTXXXM1R
M74HCTXXXB1R M74HCTXXXC1R
The M54/74HCT540 and HCT541 are high speed
CMOS OCTAL BUS BUFFERS (3-STATE)
fabricated in silicon gate C2MOS technology. They
have the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The HCT540 is an inverting buffer and HCT541 is a
non inverting buffer.
The 3 STATE control gate operates as a two input
AND such that if either G1 and G2 are high, all eight
outputs are in the high impedance state. In order to
enhance PC board layout, the HCT540 and
HCT541 offers a pinout having inputs and outputs
on opposite sides of the package. All inputs are
equipped with protection circuits against static
discharge and transient excess voltage.
This integrated circuit has input and output
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are
designed to directly interface HSC2MOS systems
with TTL and NMOS components. They are also
plug in replacements for LSTTL devices giving a
reduction of power consumption.
IT IS PROHIBITED TO APPLY A SIGNAL TO BUS
TERMINAL WHEN IT IS IN OUTPUT MODE.
WHEN A BUS TERMINAL IS FLOATING (HIGH
IMPEDANCE STATE) IT IS REQUESTED TO FIX
THE INPUT LEVEL BY MEANS OF EXTERNAL
PULL DOWN OR PULL UP RESISTOR.
PIN CONNECTION (top view)
HCT540
HCT541
October 1993
1/12
1 page  
M54/M74HCT540/541
DC SPECIFICATIONS
Symbol
Parameter
VIH High Level Input
Voltage
VIL Low Level Input
Voltage
VOH High Level
Output Voltage
VOL Low Level Output
Voltage
II Input Leakage
Current
IOZ 3 State Output
Off State Current
ICC Quiescent Supply
Current
∆ICC Additional worst
case supply
current
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
4.5 2.0 2.0 2.0
to
5.5
4.5 0.8 0.8 0.8
to
5.5
VI = IO=-20 µA 4.4
4.5
VIH
or IO=-6.0 mA 4.18
VIL
4.5
4.31
4.4
4.13
4.4
4.10
VI = IO= 20 µA
4.5
VIH
or IO= 6.0 mA
VIL
0.0 0.1
0.17 0.26
0.1
0.33
0.1
0.4
5.5 VI = VCC or GND
±0.1 ±1
±1
5.5
VI = VIH or VIL
VO = VCC or GND
5.5 VI = VCC or GND
±0.5 ±5 ±10
4 40 80
5.5 Per Input pin
VI = 0.5V or
VI = 2.4V
Other Inputs at
VCC or GND
2.0 2.9 3.0
Unit
V
V
V
V
µA
µA
µA
mA
5/12
5 Page 
DIM.
A
B
D
d1
d2
E
e
e3
F
G
M
M1
M54/M74HCT540/541
MIN.
9.78
8.89
4.2
7.37
PLCC20 MECHANICAL DATA
mm
TYP.
2.54
0.56
1.27
5.08
0.38
1.27
1.14
MAX.
10.03
9.04
4.57
MIN.
0.385
0.350
0.165
8.38 0.290
0.101
inch
TYP.
0.100
0.022
0.050
0.200
0.015
0.050
0.045
MAX.
0.395
0.356
0.180
0.330
0.004
P027A
11/12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet M54HCT541.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| M54HCT540 | OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT540: INVERTED - HCT541 NON INVERTED | ST Microelectronics |
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| M54HCT541 | OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT540: INVERTED - HCT541 NON INVERTED | ST Microelectronics |
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