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PDF M54HCT00F1R Data sheet ( Hoja de datos )

Número de pieza M54HCT00F1R
Descripción QUAD 2-INPUT NAND GATE
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! M54HCT00F1R Hoja de datos, Descripción, Manual

M54HCT00
M74HCT00
. HIGH SPEED
tPD = 12 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 1 µA (MAX.) AT TA = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUTS DRIVE CAPABILITY
10 LSTTL LOADS
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS00
. SYMMETRICAL OUTPUT IMPEDANCE
IOH= IOL = 4 mA (MIN.)
DESCRIPTION
The M54/74HCT00 is a high speed CMOS QUAD
2-INPUT NAND GATE fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption. The internal circuit is com-
posed of 3 stages including buffer output, which en-
ables high noise immunity and stable output. All
inputs are equipped with protection circuits against
static discharge and transient excess voltage.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HC devices are designed to
directly interface HSC2MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
QUAD 2-INPUT NAND GATE
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCT00F1R
M74HCT00M1R
M74HCT00B1R
M 74H CT 0 0C 1R
PIN CONNECTIONS (top view)
February 1993
NC =
No Internal
Connection
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M54HCT00F1R pdf
DIM.
a1
B
b
b1
D
E
e
e3
F
I
L
Z
M54/M74HCT00
Plastic DIP14 MECHANICAL DATA
MIN.
0.51
1.39
1.27
mm
TYP.
0.5
0.25
8.5
2.54
15.24
3.3
MAX.
1.65
20
7.1
5.1
2.54
MIN.
0.020
0.055
0.050
inch
TYP.
0.020
0.010
0.335
0.100
0.600
0.130
MAX.
0.065
0.787
0.280
0.201
0.100
P001A
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