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PDF MC14016B Data sheet ( Hoja de datos )

Número de pieza MC14016B
Descripción Quad Analog Switch/Quad Multiplexer
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Analog Switch/Quad
Multiplexer
The MC14016B quad bilateral switch is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
Each MC14016B consists of four independent switches capable of
controlling either digital or analog signals. The quad bilateral switch is used
in signal gating, chopper, modulator, demodulator and CMOS logic
implementation.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Linearized Transfer Characteristics
Low Noise — 12 nV/Cycle, f 1.0 kHz typical
Pin–for–Pin Replacements for CD4016B, CD4066B (Note improved
transfer characteristic design causes more parasitic coupling
capacitance than CD4016)
For Lower RON, Use The HC4016 High–Speed CMOS Device or The
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMC14066B
This Device Has Inputs and Outputs Which Do Not Have ESD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎProtection. Antistatic Precautions Must Be Taken.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVDD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin, Vout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎlin
DC Supply Voltage
Input or Output Voltage (DC or Transient)
Input Current (DC or Transient),
per Control Pin
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
± 10
V
V
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIsw Switch Through Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation, per Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTL Lead Temperature(8–SecondSoldering)
± 25
500
– 65 to + 150
260
mA
mW
_C
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
LOGIC DIAGRAM
(1/4 OF DEVICE SHOWN)
CONTROL
OUT
LOGIC DIAGRAM RESTRICTIONS
VSS Vin VDD
VSS Vout VDD
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
IN
MC14016B
L SUFFIX
CERAMIC
CASE 632
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
BLOCK DIAGRAM
13
CONTROL 1
1
IN 1
5
CONTROL 2
4
IN 2
6
CONTROL 3
8
IN 3
12
CONTROL 4
11
IN 4
2
OUT 1
3
OUT 2
9
OUT 3
10
OUT 4
VDD = PIN 14
VSS = PIN 7
Control
0 = VSS
1 = VDD
Switch
Off
On
MC14016B
65

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MC14016B pdf
Vout
RL
VC
Vin
Figure 6. RON Characteristics
Test Circuit
Vout
VC RL CL
Vin VX
20 ns
VC
50% 90%
10%
VDD
VSS
tPZH
Vout 10%
tPHZ
90%
Vin = VDD
Vx = VSS
tPZL tPLZ
Vout 90%
10% Vin = VSS
Vx = VDD
Figure 8. Turn–On Delay Time Test Circuit
and Waveforms
VC = VDD
OUT QUAN–TECH
MODEL
2283
IN OR EQUIV
Figure 10. Noise Voltage Test Circuit
MOTOROLA CMOS LOGIC DATA
20 ns
Vin
tPLH
Vout
Vout
RL CL
Vin
90%
50%
tPHL
20 ns
VDD
10% VSS
50%
Figure 7. Propagation Delay Test Circuit
and Waveforms
Vout
VC 10 k 15 pF
Vin
1k
Figure 9. Crosstalk Test Circuit
35
30 VDD = 15 Vdc
25
10 Vdc
20
5.0 Vdc
15
10
5.0
0
10 100 1.0 k 10 k 100 k
f, FREQUENCY (Hz)
Figure 11. Typical Noise Characteristics
MC14016B
69

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