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PDF MC14007UB Data sheet ( Hoja de datos )

Número de pieza MC14007UB
Descripción Dual Complementary Pair Plus Inverter
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No Preview Available ! MC14007UB Hoja de datos, Descripción, Manual

MC14007UB
Dual Complementary Pair
Plus Inverter
The MC14007UB multipurpose device consists of three N−Channel
and three P−Channel enhancement mode devices packaged to provide
access to each device. These versatile parts are useful in inverter
circuits, pulse−shapers, linear amplifiers, high input impedance
amplifiers, threshold detectors, transmission gating, and functional
gating.
Features
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
Pin−for−Pin Replacement for CD4007A or CD4007UB
This device has 2 outputs without ESD Protection. Antistatic
precautions must be taken.
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
−0.5 to VDD +0.5
V
V
Iin, Iout Input or Output Current
(DC or Transient) per Pin
± 10 mA
PD Power Dissipation, per Package 500 mW
(Note 1)
TA Ambient Temperature Range
−55 to +125
°C
Tstg Storage Temperature Range
−65 to +150
°C
TL Lead Temperature
(8 second Soldering)
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/°C from 65°C 5o 125°C.
http://onsemi.com
SOIC−14
D SUFFIX
CASE 751A
PIN ASSIGNMENT
D−PB
S−PB
GATEB
S−NB
D−NB
GATEA
VSS
1
2
3
4
5
6
7
14 VDD
13 D−PA
12 OUTC
11 S−PC
10 GATEC
9 S−NC
8 D−NA
D = DRAIN
S = SOURCE
MARKING DIAGRAM
14
14007UG
AWLYWW
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 11
1
Publication Order Number:
MC14007UB/D

1 page




MC14007UB pdf
MC14007UB
VDD
0.01 mF
500 mF ID CERAMIC
PULSE
GENERATOR
14
Vin
7 VSS
Vout
CL
20 ns
20 ns
90%
Vin
50%
10%
tPHL
90%
Vout
50%
10%
VDD
VSS
tPLH
VOH
VOL
tTHL tTLH
Figure 5. Switching Time and Power Dissipation Test Circuit and Waveforms
APPLICATIONS
The MC14007UB dual pair plus inverter, which has access to all its elements offers a number of unique circuit applications.
Figures 1, 6, and 7 are a few examples of the device flexibility.
DISABLE 3
+ VDD
2
VDD
14 OUT = A+BC
1 13
11 11 2
INPUT 10
DISABLE 6
12 OUTPUT
9
8
7
INPUT
1
0
X
DISABLE
0
0
1
X = Don’t Care
OUTPUT
0
1
OPEN
Figure 6. 3−State Buffer
10 12 1
B OUTPUT
8
97
5
3
C
4
6
A
Substrates of P−Channel devices internally connected to VDD;
Substrates of N−Channel devices internally connected to VSS.
Figure 7. AOI Functions Using Tree Logic
http://onsemi.com
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