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PDF PEF2023 Data sheet ( Hoja de datos )
| Número de pieza | PEF2023 | |
| Descripción | ISDN DC Converter Circuit IDCC | |
| Fabricantes | Siemens Semiconductor Group | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PEF2023 (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
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ICs for Communications
ISDN DC Converter Circuit
IDCC
PEB 2023 Version 1.1
PEF 2023 Version 1.1
Data Sheet 08.97
DS 2
1 page  
ISDN DC Converter Circuit
IDCC
Data Sheet
PEB 2023
PEF 2023
SPT 75 R
P-DSO-14
1.1 Features
• Switched Mode DC/DC Converter
• ITU ISDN Compatible
• Low Power Dissipation
• Supply Voltage Range 0: 8V to 16V
Supply Voltage Range 1: 12V to 80V
Supply Voltage Range 2: 22V to 90V
(pin striping selects between range 1 and range 2)
Supply Voltage Range 3, with shifting by an external zener diode: UZD+8V to UZD+90V
(minimum zener voltage UZD = 14V)
• Programmable Overcurrent Protection
• Soft Start
• Power Housekeeping Input
• Input Undervoltage Detection
• High Input Impedance (<10µA) During Undervoltage Condition
• Oscillator Synchronization Input/Output
• High Voltage Smart Power Technology 75V
• P-DSO-14/1 Package
Type
PEB 2023
PEF 2023
Ordering Code
Q67100-H6830
Q67220-H1059
Package
P-DSO-14
P-DSO-14
Semiconductor Group
5
08.97
5 Page 
PEB 2023
PEF 2023
Overview
Figure 4 shows the PEB/F 2023 in flyback configuration with transformer isolation using
supply voltage range 3. This application circuit is used to supply the internal IC’s of the
NT from the U-interface and also to supply the S-interface in case of restricted power
mode. The DC/DC-converter begins operating when the input voltage exceeds 38V
(UZD+8V, see supply voltage range 3). In the start-up phase the PEB/F 2023 is supplied
through VS. After this start-up phase, the PEB/F 2023 is supplied via VEXT (power
housekeeping input) and the DC/DC-converter will operate until the input voltage falls
below 20V (input undervoltage detection). For power saving reasons the value of resistor
R6 is as high as possibile.
The maximum static VS supply voltage in this example is 120V. How to get a higher
maximum dynamic VS supply voltage see chapter „1.6 Surge Protection“ on pages 14
and 15.
To get a very fast input undervoltage detection see chapter „1.7 Fast Input Undervoltage
Detection“ on page 15.
41 (20) ... 120 V
ZD1
BZV55C33
R6
10ΜΩ/10%
0.47µF
20%
C5 +
R5
0.56Ω/5%
T1
BSP 89
C6 +
100µF
20%
7 11 12 5 6 2 4
VS UV UVx VEXT CSS IP GA
PEB 2023
PEF 2023
GND RC VREF VP SYNC COMP VN
3 14 1 9 13 8 10
N1
0V
R1
39ΚΩ
5%
C1
1nF
5%
R2
47ΚΩ/5%
+ C3
1µF
20%
C2
100nF
10%
BAW 76
R3 33ΚΩ
1%
D1
R4
68ΚΩ/1%
+ C4
N3
10µF
20%
BYS 21-45
D2
CL1 +
N2a 220µF
20%
+5V
RLoad1
82Ω/1%
AAAAAA0 V
CL2 +
N2b 68µF
20%
D3
BAS 21
RLoad2
3.9ΚΩ/1%
- 42 V
BYS 21-45
D4
CL3 +
N2c 100µF
20%
RLoad3
130Ω/1%
2.2 V
Figure 4
PEB/F 2023 in Flyback Configuration with Transformer Isolation
Semiconductor Group
11
08.97
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet PEF2023.PDF ] | |
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