|
|
PDF PEB24902 Data sheet ( Hoja de datos )
| Número de pieza | PEB24902 | |
| Descripción | Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE | |
| Fabricantes | Siemens Semiconductor Group | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PEB24902 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
ICs for Communications
Quad ISDN Echocancellation Circuit Analogue Front End
Quad IEC AFE
PEB 24902 Version 1.1
PEF 24902 Version 1.1
Data Sheet 5.96
T2490-211-D2-7600
1 page  
PEB 24902
PEF 24902
Overview
1 Overview
The PEB 24902 Quad IEC AFE (Quadruple ISDN Echocancellation Circuit Analogue
Front End) is part of a 2B1Q or 4B3T ISDN U-transceiver chip set. Up to four lines can
be accessed simultaneously by the Quad IEC AFE. The Quad IEC AFE is optimized to
work in conjunction with the PEB 24901 Quad IEC DFE-T and the PEB 24911 Quad IEC
DFE-Q. An integrated PLL synchronizes the 15.36 MHz Master clock onto the 8 kHz or
2048 kHz PTT Clock. This specification describes the functionality for 2B1Q and 4B3T
interfaces.
Semiconductor Group
5
05.96
5 Page 
Table 1
Pin Definitions and Functions (cont’d)
Pin No. Symbol
62 VREF4
Input (I) Description
Output (O)
I/O VREF pin to Buffer internally
generated voltage with capacitor.
100 nF vs. GND
PEB 24902
PEF 24902
Overview
Reference
2
JTAG Boundary Scan
57 TCK
I
58 TMS
I
55 TDI
I
56 TDO
O
59 TDISS I
Test Clock.
Test Mode Select, internal pullup.
Test Data Input, internal pullup.
Test Data Output.
JTAG Boundary Scan Disable, active
low, internal pullup.
3.5,4.3
3.5,4.3
3.5,4.3
3.5,4.3
3.5
Line Port Pins
29 AIN1
I
28 BIN1
I
33 AOUT1 O
36 BOUT1 O
20 AIN2
I
21 BIN2
I
16 AOUT2 O
13 BOUT2 O
52 AIN3
I
Differential U interface input.
Line port 1
Differential U interface input.
Line port 1
Differential U interface output.
Line port 1
Differential U interface output.
Line port 1
Differential U interface input.
Line port 2
Differential U interface input.
Line port 2
Differential U interface output.
Line port 2
Differential U interface output.
Line port 2
Differential U interface input.
Line port 3
3.2.1
3.2.1
3.2.3
3.2.3
3.2.1
3.2.1
3.2.3
3.2.3
3.2.1
Semiconductor Group
11
05.96
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PEB24902.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PEB24902 | Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE | Siemens Semiconductor Group |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |