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PDF LCDP1521 Data sheet ( Hoja de datos )
| Número de pieza | LCDP1521 | |
| Descripción | DUAL LINE PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR SLIC PROTECTION | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LCDP1521 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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® LCDP1521
DUAL LINE PROGRAMMABLE TRANSIENT VOLTAGE
A.S.D.™
SUPPRESSOR FOR SLIC PROTECTION
FEATURES
s Dual line programmable transient voltage
suppressor
s Wide negative firing voltage range:
VMGL = -150 V max.
s Low dynamic switching voltages: VFP and VDGL
s Low gate triggering current: IGT = 5 mA max
s Peak pulse current: IPP = 15 A (10/1000 µs)
s Holding current: IH = 150 mA min
DESCRIPTION
This device has been especially designed to
protect 2 new high voltage, as well as classical
SLICs, against transient overvoltages.
Positive overvoltages are clamped by 2 diodes.
Negative surges are suppressed by 2 thyristors,
their breakdown voltage being referenced to -VBAT
through the gate.
This component presents a very low gate
triggering current (IGT) in order to reduce the cur-
rent consumption on printed circuit board during
the firing phase.
BENEFITS
Trisils are not subject to ageing and provide a fail
safe mode in short circuit for a better protection.
Trisils are used to help equipment to meet various
standards such as UL1950, IEC950 / CSA C22.2,
UL1459 and FCC part68. Trisils have UL94 V0
resin approved (Trisils are UL497B approved (file:
E136224)).
SO-8
FUNCTIONAL DIAGRAM
TIP 1 1
GATE 2
GATE 3
8 RING 1
7 GND
6 GND
TIP 2 4
5 RING 2
March 2002 - Ed: 1A
1/8
1 page  
FUNCTIONAL HOLDING CURRENT (IH) TEST CIRCUIT : GO-NO GO TEST
LCDP1521
R
Surge generator
VBAT = - 100V
D.U.T
This is a GO-NO GO test which allows to confirm the holding current (IH) level in a functional test circuit.
TEST PROCEDURE :
- Adjust the current level at the IH value by short circuiting the D.U.T.
- Fire the D.U.T. with a surge current : IPP = 10A, 10/1000µs.
- The D.U.T. will come back to the off-state within a duration of 50ms max.
TEST CIRCUIT FOR VFP AND VDGL PARAMETERS
(VP is defined in unload condition)
L
R2
VP C1
R1
R4
R3
C2
TIP
RING
GND
Pulse (µs) Vp C1 C2 L R1 R2 R3 R4 IPP Rs
tr tp (V) (µF) (nF) (µH) (Ω) (Ω) (Ω) (Ω) (A) (Ω)
10 700 1500 20 200
0
50 15 25 25 10 110
1.2 50 1500 1 33 0 76 13 25 25 15 60
2 10 2500 10 0 1.1 1.3 0 3 3 10 245
5/8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet LCDP1521.PDF ] | |
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