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PDF LC89585 Data sheet ( Hoja de datos )
| Número de pieza | LC89585 | |
| Descripción | CD Encoder LSI for CD-R Systems | |
| Fabricantes | Sanyo | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LC89585 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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Ordering number : EN 5160A
CMOS LSI
LC89585
CD Encoder LSI for CD-R Systems
Overview
The LC89585 is an LSI that implements the digital
processing required for CD-R recording in conformance
with the orange book specifications. The LC89585 adds
subcode data to record data processed by an A/D
converter and the built-in DIR (digital audio interface
receiver), FS decoder, and CD decoder circuits, and
converts that data to CIRC (cross-interleave reed-solomon
code) data. The LC89585 then performs EFM (eight-to-
fourteen modulation encoding) conversion in real time.
Features
• A/D converter clock generation
• Built-in DIR (conforming to the IEC958 standard) and
DIT (Digital audio interface transmitter)
• Built-in fader and muting circuits
• On-chip buffer RAM for encoder processing
• Automatic linking position processing function
• CCB CPU interface
Package Dimensions
unit: mm
3151-QFP100E
[LC89585]
SANYO: QIP100E
Specifications
Absolute Maximum Ratings at VSS = 0 V
Parameter
Maximum supply voltage
I/O voltages
Operating temperature
Storage temperature
Soldering temperature resistance
Symbol
VDD max
VI, VO
Topr
Tstg
Ta = 25°C
Ta = 25°C
Conditions
10 seconds (pins only)
Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V
Parameter
Supply voltage
Input voltage
Symbol
VDD
VIN
Conditions
Ratings
–0.3 to +7.0
–0.3 to VDD + 0.3
–30 to +70
–55 to +125
260
Unit
V
V
°C
°C
°C
min typ max Unit
4.5 — 5.5 V
0
—
VDD
V
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN
13098HA (OT)/71595HA (OT) No. 5160-1/6
1 page  
Continued from preceding page.
Pin No.
51
52
53
54
55
56
57
58
59
60
61
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63
64
65
66
67
68
69
70
71
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80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Symbol
TP7
CAS
OE
A8
A7
A6
A5
A4
A3
A2
VDD
VSS
A1
A0
A9
RAS
WR
DQ2
DQ1
DQ4
DQ3
TP0
TP1
TP2
TP3
ENCVCOIN
ENCLPFO
ENCLPFI
ENCPCO
ENCERR
TP4
TP5
RFDET
RECEN
TP8
DET4T
DET3T
EFM
VDD
VSS
ENCCK
EXTACK
EXTSYNC
ATIPSYNC
SUBSYNC
CCB
CE
CL
DI
DO
LC89585
I/O Function
I Test pin
O DRAM column address strobe signal output
O DRAM output enable signal output
O
O
O
O DRAM address outputs
O
O
O
— +5 V power supply
— Ground
O
O DRAM address outputs
O
O DRAM row address strobe signal output
O DRAM read/write signal output
I/O
I/O
DRAM data I/O
I/O
I/O
I
I
Test pin
I
O
I Encoder circuit clock input
O Low-pass filter output
I Low-pass filter input
O Phase comparator output
O Lock state monitor output
O
Test pin
I
I RF signal input
I Record enable signal input
O Test pin
O 4T detection signal output
O 3T detection signal output
O EFM signal output
— +5 V power supply
— Ground
O Encoder clock output
O ATIP synchronization reporting signal output
I ATIP synchronization enable signal input
I ATIP synchronization signal input
O Subcode synchronization signal output
I CPU interface type switching signal input
I CPU interface chip enable signal input
I CPU interface data transfer clock input
I CPU interface data input
O CPU interface data output
No. 5160-5/6
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet LC89585.PDF ] | |
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