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PDF LC895299W Data sheet ( Hoja de datos )

Número de pieza LC895299W
Descripción 48 x Speed ATAPI (IDE) CD-ROM Decoder with On-Chip Digital Servo System
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LC895299W Hoja de datos, Descripción, Manual

Ordering number : ENN6249A
CMOS IC
LC895299W, 895299L
48× Speed ATAPI (IDE) CD-ROM Decoder
with On-Chip Digital Servo System
Overview
The LC895299W and LC895299L are CD-ROM drive
digital servo system ICs that integrate all signal-
processing functions after the RF head amplifier on a
single chip.
Functions
• Built-in digital servo and ATAPI (IDE) CD-ROM,
CD-DSP, CAV audio, and1-Mbit DRAM functions
Features
CD-DSP Block
• Supports full CAV operation at 48× speed
• Assures stable data readout by performing frame sync
signal detection, protection, and interpolation.
• Demodulates the EFM signal to produce 8-bit symbol
data.
• Applies a CRC check to the subcode Q signal and then
outputs that signal via parallel I/O to the system
microprocessor.
• Performs unscrambling and deinterleaving operations to
rearrange the demodulated EFM signal in the stipulated
order.
• Detects and corrects error signals and processes flags
(C1: 2 errors, C2: 4 errors)
• References the C1 flags and the C2 error check result to
set the C2 flags and interpolates or mutes the signal
depending on the C2 flags.
• Provides two types of muting: zero-cross muting and
soft muting.
• Independent left and right channel digital attenuators
(8-bit resolution)
Provides two types of attenuation: direct attenuation and
soft attenuation.
• Bilingual support
• Built-in digital audio interface (supports both CLV and
CAV)
• Built-in digital deemphasis
• Built-in 8× oversampling digital filters
• Built-in D/A converters
CD-ROM Decoder and ATAPI (IDE) Interface
Block
• Built-in ATAPI (IDE) interface
• The user can freely set the CD main channel, C2 flag,
and subcode areas in internal DRAM.
• Batch transfer function (Function for transferring the CD
main channel, C2 flag, or subcode data in a single
operation.)
• Multiple transfer function (Function for transferring
multiple blocks automatically in a single operation.)
• CAV audio functions
• Intelligent functions (auto buffering, auto decoding, and
CD-R functions)
• Subcode P to W buffering function (No ECC) and
CD-TEXT support
• Supports Ultra DMA MODE2, MODE1, and MODE0
• Built in 1-Mbit DRAM
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
13100TH (OT)/31599HA (OT) No. 6249-1/12

1 page




LC895299W pdf
Pin Functions
LC895299 Pin Functions 1
(When pin 95, ATPINSEL, is low)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Pin
VSS
FLOCK/CRCERR
DIR/TLOCK
ZSWAIT
WRQ/HFLO
ZINT0
ZINT1
TEST0
D0
D1
D2
D3
D4
D5
D6
D7
MCK
ZCS
VDDD
VDD1
VSS
VSSD
SUA0
SUA1
SUA2
SUA3
SUA4
SUA5
SUA6
SUA7
ZWR
ZRD
FSEQ
DOUT/TESO
VDD0
VSS
PLL1
PLL2
PLL3
PLL1 VDD
PLL1 VSS
CSEL
ZHRST
ZDASP
ZCS3FX
ZCS1FX
VSS1
VDD0
Type
P
O
O
O
O
O
O
I
B
B
B
B
B
B
B
B
O
I
NC
NC
P
P
P
P
NC
NC
I
I
I
I
I
I
I
I
I
I
O
O
P
P
I
I
O
P
P
I
I
B
I
I
I
I
LC895299W, 895299L
I INPUT
O OUTPUT
Type
B BIDIRECTION NC NOT CONNECT
P POWER
Logic system ground
Function
Monitor outputs
Wait signal output to the microcontroller
Monitor output
Microcontroller interrupt
Test pin (Must be tied to ground during normal operation.)
Microcontroller data bus
Clock output to the microcontroller
Microcontroller ZCS signal
DRAM VDD: 5 V
3.3 V
Logic system ground
DRAM ground
Microcontroller address bus
Microcontroller write signal
Microcontroller read signal
Frame synchronization detection
Digital output/tes output
I/O system power supply: 5 V
Logic system ground
System Clock PLL
Logic PLL VDD: 3.3 V
Logic PLL system ground
ATAPI I/F
I/F ground
I/O system power supply: 5 V
Continued on next page.
No. 6249-5/12

5 Page





LC895299W arduino
Continued from preceding page.
Pin No.
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
Pin
VSSD
VDD1
VSS
VDDD
DSLB
AVDD
SLCIST1
SLCIST2
SLCO0
SLCO1
SLCO2
SLCO3
EFMIN
EFMIN2
AVSS
JITIN
JITC
RPO
OPP
PCKISTF
PCKISTP
PLL2VDD
PLL2VSS
PDO
PDS1
PDS2
PDS3
FR
SVSS
AD0
AD1
PH
BH
RREC
FE
TE
TES
VREF
CSS
AD2
PHC
BHC
FBAL
SVDD
SVSS
TBAL
SGC
TOFST
TDO
FDO
SLDO
SPDO
LC895299W, 895299L
I/O Function
NC
P DRAM ground
P 3.3 V
P Logic system ground
P DRAM VDD: 5 V
NC
NC
O SLC PWM output
P Slice level VDD: 3.3 V
I
EFM slice level setting
I
O
O
EFM slice level outputs
O
O
I
EFM input
I
P Slice level ground
I Jitter detection input
O Jitter output
O
P/N balance adjustment
I
I Frequency comparator charge pump setting
I Phase comparator charge pump setting
P VCEC PLL VDD: 3.3 V
P VCEC PLL ground
O Charge pump filter
O
O Charge pump selection
O
I VCO frequency setting
P Servo system ground
I A/D converter input 0
I A/D converter input 1
I Peak hold circuit
I Bottom hold circuit
I Optical recognition input
I FE input
I TE input
I TES comparator input
I VREF input
I Center servo input
I A/D converter input 2
O PH slice capacitor connection
O BH slice capacitor connection
O Focus balance
P Servo system VDD: 5V
P Servo system ground
O Tracking balance
O Servo gain adjustment
O Tracking offset adjustment
O Tracking output
O Focus output
O Sled output
O Spindle output
Continued on next page.
No. 6249-11/12

11 Page







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