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PDF LC89086M Data sheet ( Hoja de datos )

Número de pieza LC89086M
Descripción 8 Bit A/D Converter
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LC89086M Hoja de datos, Descripción, Manual

Ordering number : EN *5428A
CMOS LSI
LC89086M
8 Bit A/D Converter
Preliminary
Overview
The LC89086M is a low-power high-speed 8-bit serial-
parallel A/D converter fabricated in a high-speed CMOS
process.
Features
• Resolution: 8 bits (with an overflow output)
• Maximum conversion rate: 20M samples per second
• Error: Less than ±1.0 LSB
• Power supply: +5-V single-voltage power supply
• Power dissipation: 150 mW (typical)
• Analog input voltage range: VSS to VDD
• Digital output voltage: 3 state TTL level
Package Dimensions
unit: mm
3155-MFP24
[LC89086M]
Specifications
Absolute Maximum Ratings at Ta = 25°C, DVSS = AVSS = 0 V
Parameter
Maximum supply voltage
Input voltage
Operating temperature
Storage temperature
Symbol
VDD max
VIN max
Topr
Tstg
Conditions
Recommended Operating Conditions
Parameter
Supply voltage
Operating ambient temperature
Symbol
VDD
Ta
Conditions
SANYO: MFP24
Ratings
–0.3 to +7.0
–0.3 to VDD +0.3
–30 to +70
–40 to +125
Unit
V
V
°C
°C
min
4.5
–30
Ratings
typ
5.0
max
5.5
+70
Unit
V
°C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
O3097HA (OT) No. 5428-1/6

1 page




LC89086M pdf
LC89086M
Pin Functions
Pin No. Pin name
I/O
Function
1 OEB
Digital output enable input
I High: high-impedance
Low: Normal operation
2 DVSS
3 AVSS
4 Vref HO
Digital ground
Analog ground
Internal reference voltage (high) generation. Shorting this pin to VrefH (pin 5) generates a voltage of 2.0 V.
O This pin must be left open when the internally generated potential is not used.
5 Vref H
I Reference voltage input (high)
6 AIN
I Analog input
7 Vref M
O Reference voltage intermediate level tap.
8 Vref L
I Reference voltage input (low)
9 Vref LO
Internal reference voltage (low) generation. Shorting this pin to VrefL (pin 8) generates a voltage of 0 V.
O This pin must be left open when the internally generated potential is not used.
10 AVDD
11 AVSS
12 DVSS
13 DVDD
14 D8
Analog power supply
Analog ground
Digital ground
Digital power supply
O Digital output (LSB)
15 D7
O Digital output
16 D6
O Digital output
17 D5
O Digital output
18 D4
O Digital output
19 D3
O Digital output
20 D2
O Digital output
21 D1
O Digital output (MSB)
22 OF
O Digital output (Overflow)
23 CLK
I Clock input
24 DVDD
Digital power supply
Note: There must be no potential difference between the digital system and analog system VDD and VSS power supply potentials.
I/O Code Table
The table below lists the relationship between the input and output when VrefH and VrefL are set up so that the zero
transient voltage is 0.000 V and the full-scale transient voltage is 2.008V.
Analog input
VAIN (V)
Up to 0.000
Up to 0.008
Up to 0.016
Up to 0.024
Up to 0.032
Digital output
OF D1 D2 D3 D4 D5 D6 D7 D8
000000000
000000000
000000001
000000010
000000011
to
Up to 0.992
Up to 1.000
Up to 1.008
Up to 1.016
001111110
001111111
010000000
010000001
to
Up to 1.992
Up to 2.000
Up to 2.008
Over 2.008
011111101
011111110
011111111
111111111
No. 5428-5/6

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