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PDF LC866528 Data sheet ( Hoja de datos )

Número de pieza LC866528
Descripción 8-Bit Single Chip Microcontroller with One-Time Programmable PROM
Fabricantes Sanyo 
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No Preview Available ! LC866528 Hoja de datos, Descripción, Manual

Ordering number : ENN*6747
CMOS IC
LC86E6548
8-Bit Single Chip Microcontroller
with the UVEPROM
Preliminary
Overview
The LC86E6548 is a CMOS 8-bit single chip microcontroller with UVEPROM for the LC866500 series.
This microcontroller has the function and the pin description of the LC866500 series mask ROM version, and 48K-byte
EPROM. The program data is rewritable. It is suitable to develop the program.
Features
(1) Option switching by EPROM data
The option function of the LC866500 series can be specified by the EPROM data.
LC86E6548 can be checked the function of the trial pieces using the mass production board.
(2) Internal one-time EPROM capacity :
49408 bytes
(3) Internal RAM capacity
: 1152 bytes
Used EPROM or RAM capacity are equal ROM or RAM capacity of mask ROM version which applies
LC86E6548 .
Mask ROM version
LC866548
LC866540
LC866532
LC866528
LC866524
EPROM capacity
49152 bytes
40960 bytes
32768 bytes
28672 bytes
24576 bytes
RAM capacity
1152 bytes
1152 bytes
1152 bytes
896 bytes
896 bytes
Ver.1.02
73196
91400 RM (IM) SK No.6747-1/21

1 page




LC866528 pdf
Pin Assignment
S48/PG0
S49/PG1
S50/PG2
S51/PG3
P00
P01
P02
P03
VSS2
VDD2
P04
P05
P06
P07
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
LC86E6548
50 S19/PC3
49 S18/PC2
48 S17/PC1
47 S16/PC0
46 VDD3
45 S15/T15
44 S14/T14
43 S13/T13
42 S12/T12
41 S11/T11
40 S10/T10
39 S9/T9
38 S8/T8
37 S7/T7
36 S6/T6
35 S5/T5
34 S4/T4
33 S3/T3
32 S2/T2
31 S1/T1
SANYO: QFC100S
No.6747-5/21

5 Page





LC866528 arduino
LC86E6548
2. Recommended Operating Range at Ta=+10°C to +40°C, VSS1=VSS2=0V
Parameter
Symbol
Operating
VDD(1)
Supply voltage
Hold voltage VHD
Pull-down
Voltage
Input high
voltage
VP
VIH(1)
VIH(2)
VIH(3)
VIH(4)
VIH(5)
Input low
voltage
VIH(6)
VIH(7)
VIH(8)
VIL(1)
VIL(2)
VIL(3)
VIL(4)
Operation
cycle time
VIL(5)
VIL(6)
VIL(7)
tCYC
Pins
VDD1=VDD2
=VVDD3=VDD4
VDD1=VDD2
VP
Conditions
0.98µs tCYC
tCYC 400µs
RAMs and the
registers hold
voltage at HOLD
mode.
Port 0 at CMOS output Output disable
Port 0 at N-ch open drain
output
•Port 1
•Ports 72,73
•Port 3 at CMOS
output
•Port 3 at N-ch open
drain output
•Port 70
Port input/interrupt
•Port 71
RES
Port 70
Watchdog timer
•Port 8
•Ports 74 ,75
S16 to S51
Port 0 at CMOS
output option
Port 0 at N-ch open
drain output
•Ports 1,3
•Ports 72,73
•Port 70
Port input/interrupt
•Port 71
RES
Port 70
Watchdog timer
•Port 8
•Ports 74 ,75
S16 to S51
Output disable
Output disable
Output disable
Tr. OFF
Output disable
Output disable
Output disable
Output P-channel
Tr. OFF
Output disable
Output disable
Output disable
Output disable
Output disable
Output disable
Output P-channel
Tr. OFF
Continue.
VDD[V]
min.
Ratings
typ.
max.
unit
4.5 6.0 V
2.0 6.0
4.5 to 6.0 -35
4.5 to 6.0 0.33VDD
+1.0
4.5 to 6.0 0.75VDD
4.5 to 6.0 0.75VDD
VDD
VDD
13.5
VDD
4.5 to 6.0 0.75VDD
4.5 to 6.0 0.75VDD
13.5
VDD
4.5 to 6.0 0.9VDD
4.5 to 6.0 0.75VDD
4.5 to 6.0 0.33VDD
+1.0
4.5 to 6.0 VSS
4.5 to 6.0 VSS
4.5 to 6.0 VSS
4.5 to 6.0 VSS
VDD
VDD
VDD
0.2VDD
0.25VDD
0.25VDD
0.25VDD
4.5 to 6.0
4.5 to 6.0
VSS
VSS
4.5 to 6.0
4.5 to 6.0
VP
0.98
0.8VDD
-1.0
0.25VDD
0.2VDD
400 µs
No.6747-11/21

11 Page







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