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PDF LA9702W Data sheet ( Hoja de datos )

Número de pieza LA9702W
Descripción DVD Player Front End Processor
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LA9702W Hoja de datos, Descripción, Manual

Ordering number : ENN6575
Monolithic Linear IC
LA9702W
DVD Player Front End Processor
Overview
The LA9702W is an RF signal-processing and servo error
signal generation IC for DVD and CD playback. A DVD
player can be implemented by combining this IC with a
DVD DSP product that includes a digital servo DSP.
Functions and Features
• RF signal generation (with built-in gain adjustment
VGA circuit)
• RF peak detection and generation
• RF bottom detection and generation (with time constant
switching)
• Built-in RF equalizer amplifiers (two systems)
• FE amplifier (with built-in balance adjustment VCA and
offset cancellation pin)
• Three-beam TE amplifier (with built-in balance
adjustment VCA and offset cancellation pin)
• Reflection amplifier
• DPD circuit
• Tracking hold circuit
• Push-pull TE amplifier (with built-in balance adjustment
VCA)
• Built-in wobble detection bandpass filter
• APC circuits (two systems)
• Defect detection circuit
Package Dimensions
unit: mm
3220-SQFP80
[LA9702W]
1.25
60
14.0
12.0
0.5 1.25
41
0.135
61 40
80
1
21
0.2 20
0.5 0.5
SANYO: SQFP80
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VCC max
Pd max
Topr
Tstg
Conditions
Pdmax for 70°C (when mounted on a PCB)
Note: These specifications are subject to change without notice.
Ratings
6.0
500
–25 to +70
–40 to +150
Unit
V
mW
°C
°C
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
N2001RM (OT) No. 6575 -1/10

1 page




LA9702W pdf
LA9702W
7. FE amplifier
The signal input from either pins 3, 4, 5, and 6 or pins 8 and 9 is first passed through an offset adjustment circuit and is
then passed through a balance adjustment VCA. Then either the calculation <(pin 3 + pin 5) – (pin 4 + pin 6)> or <pin
8 – pin 9> is performed. The result is passed through the servo gain adjustment VCA and output from pin 29. The gain
of the balance adjustment VCA is adjusted by the DC voltage input to pin 19. The offset adjustment can be adjusted by
the DC voltage applied to pin 23. The VCA that adjusts the servo gain is controlled by the DC voltage applied to pin
18.
Note that when the pin 76 input is high, pins 3, 4, 5, and 6 are selected, and when low, pins 8 and 9 are selected.
8. TE amplifier (for three-beam operation)
The current signal input to pin 10 and 11 is converted from a current to a voltage, passed through an offset adjustment
circuit, and passed through a balance adjustment VCA. Then the calculation <pin 11 – pin 10> is performed and the
result passed through a servo gain adjustment VCA. The result is output from pin 30 after band switching. The offset
adjustment can be adjusted by the DC voltage applied to pin 24. The gain of the balance adjustment VCA can be
adjusted by the DC voltage applied to pin 20. The VCA that adjusts the servo gain is controlled by the DC voltage
applied to pin 18. The band switching circuit is a low-pass filter with a cutoff frequency of 30 kHz when pin 57 is high
and 100 kHz when pin 57 is low. When pin 53 is low, pin 30 operates in hold mode.
Note that the three-beam TE is used when pin 68 is low.
9. DPD circuit
The phases of the signals input to pins 1 and 2, and the signals input to pins 3, 4, 5, and 6 are compared and the result
outputs from pin 30.
The phase comparison result signal is output as a current by the pin 38 constant-current charge pump and converted to
a voltage level by the external capacitor and resistor on pin 38. The voltage-converted signal is passed through a buffer
amplifier, is band limited by a band switching circuit, and is output from pin 30. The charge pump is turned off when
pin 51 is high. The band switching circuit is a low-pass filter with a cutoff frequency of 30 kHz when pin 57 is high
and 100 kHz when pin 57 is low. When pin 53 is low, pin 30 operates in hold mode.
Note that the DPD circuit is used when pin 63 will be high.
10. PP amplifier
The signals input to pins 3, 4, 5, and 6 are passed first through an offset adjustment circuit and then through a balance
adjustment VCA. The calculation <(pin 3 + pin 6) – (pin 4 – pin 5)> is performed. The result is passed through a servo
gain adjustment VCA and is output from pin 35 after band switching. The offset adjustment can be adjusted by the DC
voltage applied to pin 24. The gain of the balance adjustment VCA can be adjusted by the DC voltage applied to pin
20. The VCA that adjusts the servo gain is controlled by the DC voltage applied to pin 18.
Note that the PP amplifier is used when pin 68 will be high.
11. Wobble bandpass filter
The signal input to pin 34 is passed through a bandpass filter and output from pin 32. The frequency fo for the
bandpass filter can be modified with the external resistor on pin 33. When the pin 33 external resistor is 62 k, fo will
be about 200 kHz.
12. APC circuit
A servo loop that holds the laser power fixed can be formed by inputting a monitor signal to pin 14 and connecting the
laser driver to pin 13. The laser can be turned off by setting pin 72 low.
Note that there are two APC systems, with the other system consisting of pin 16 as the monitor input pin, pin 15 as the
drive pin, and pin 70 as the laser off control pin.
13. Reference circuit
A voltage that is created by resistor dividing VCC by 2 is output from pin 26. The pin 26 voltage is buffered and output
from pins 79 and 27. The pin 79 voltage is a special-purpose reference voltage only for use by the pickup, and the pin
27 voltage is a reference supplied to the DSP and other systems.
No. 6575 -5/10

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