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PDF LA7577 Data sheet ( Hoja de datos )

Número de pieza LA7577
Descripción Super-split PLL-II VIF and SIF IF Signal Processor for TV/VTRs
Fabricantes Sanyo 
Logotipo Sanyo Logotipo



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No Preview Available ! LA7577 Hoja de datos, Descripción, Manual

Ordering number: EN 4037C
Monolithic Linear IC
LA7577N
Super-split PLL-II VIF and SIF
IF Signal Processor for TV/VTRs
Overview
Features
The LA7577N is a high tone quality and high picture qual-
ity, video IF and sound IF IC. It employs split processing
of the video IF signal and sound IF signal using SAW fil-
ters and a PLL detector. Further, the PLL detector incorpo-
rates a buzz canceler for Nyquist buzz interference
suppression to achieve high tone quality.
Functions
VIF stage
• VIF amplifier
• PLL detector
• B/W noise canceler
• RF AGC
• VCO
• Equalizer amplifier
• AFT
• APC detector
• APC filter
• Lock detector
• IF AGC
• Buzz canceler
• Employs split processing for wide bandwidth video
characteristics
• PLL detector with buzz canceler for excellent buzz and
buzz beat characteristics
• APC time constant switch built-in
• High-speed AGC supports double time constant method
• SIF carrier level AGC in the 1st SIF stage for good SIF
weak electric field characteristics
• Good differential gain and phase characteristics
• RF AGC easily adjusted using a variable resistor
Package Dimensions
unit: mm
3067-DIP24S
[LA7577N]
1st SIF stage
• Preamplifier with AGC
• 1st SIF detector
SIF stage
• SIF limiter amplifier
• FM quadrature detector
Mute stage
• Sound mute (pin 2)
• AV mute (pin 4)
• IS-15 switch (pin 13)
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Circuit voltages
Symbol
VCC max
Pd max
V3, V13
V11
V23
Conditions
Ta 50°C
Ratings
13.8
1200
VCC
VCC
VCC
Unit
V
mW
V
V
V
SANYO Electric Co., Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
60597HA(ID) / 11795TH(ID) No. 4037—1/16

1 page




LA7577 pdf
LA7577N
Sample Application Circuit (Japan)
(when the SIF, 1st SIF, AFT and RF AGC are not used)
When the SIF stage is not used
• Leave pin 1 open
• Tie pin 2 to GND
• Leave pin 24 open
When the 1st SIF stage is not used
• Connect a 0.01µF capacitor between pin 8 and GND (leave the 0.01µF capacitor on pin 23 connected to GND)
• Leave pin 22 open
When the AFT circuit is not used
• Tie pins 11 and 12 to GND
• Leave pin 14 open
When the RF AGC circuit is not used
• Connect a 0.01µF capacitor between pin 4 and GND
• Leave pin 10 open
No. 4037—5/16

5 Page





LA7577 arduino
LA7577N
AFT Tank (Pins 11 and 12)
The automatic frequency tuner (AFT) tank connected to
pins 11 and 12 generates the 90° phase shift required for
quadrature detection. The band-pass frequency character-
istics of the IF SAW filter and the AFT tank are shown in
Figure 17(A) and 17(B), respectively. The combined
response is shown in Figure 17(C). The resulting extended
low-frequency response, which increases susceptibility to
incorrect operation, can be reduced by connecting capaci-
tor C2 in series with the AFT tank as shown in Figure 18.
The resultant frequency response is shown in Figure
17(D).
Capacitors C1 and C2 should have a ratio of approxi-
mately 5 to 1. An inductor or resistor should also be con-
nected in parallel with C2 to maintain the DC balance of
the AFT tank.
The AFT can be defeated by connecting pin 11 to ground
through resistor R1, which should be 20kor lower.
Figure 17. AFT tank characteristics
Figure 18. AFT tank
AFT Output (Pin 14)
An external bleeder resistor is required to generate the
AFT voltage. The AFT loop time constant is formed by
external resistor R3 and capacitor C2, as shown in Figure
19. The resistor also provides overvoltage protection.
Fluctuations in the AFT quiescent output voltage, if
present in station selector systems using PLLs or voltage
synthesizers, can be reduced by connecting series resistor
R4 as shown in Figure 20. Note, however, that this also
reduces the AFT range.
Figure 19. AFT loop time constant
No. 4037—11/16

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