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PDF KA7500C Data sheet ( Hoja de datos )

Número de pieza KA7500C
Descripción SMPS Controller
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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No Preview Available ! KA7500C Hoja de datos, Descripción, Manual

KA7500C
SMPS Controller
www.fairchildsemi.com
Features
• Internal Regulator Provides a Stable 5V Reference Supply
Trimmed to ±1% Accuracy.
• Uncommitted Output TR for 200mA Sink or Source
Current
• Output Control for Push-Pull or Single-Ended Operation
• Variable Duty Cycle by Dead Time Control (Pin 4)
Complete PWM Control Circuit
• On-Chip Oscillator With Master or Slave Operation
• Internal Circuit Prohibits Double Pulse at Either Output
Description
The KA7500C is used for the control circuit of the pulse
width modulation switching regulator. The KA7500C
consists of 5V reference voltage circuit, two error amplifiers,
flip flop, an output control circuit, a PWM comparator, a
dead time comparator and an oscillator. This device can be
operated in the switching frequency of 1kHz to 300kHz. The
precision of voltage reference (Vref) is improved up to ±1%
with trimming. This provides a better output voltage
regulation. The operating temperature range is
-25°C ~ +85°C.
16-DIP
Internal Block Diagram
RT 6
CT 5
OSCILLATOR
1
16-SOP
1
OUTPUT CONTROL
13
DQ
DEAD 4
TIME
CONTROL
1.2V
CK Q
EA(+) 1
EA(-) 2
+
_1
EA(+) 16
EA(-) 15
+
2
_
PWM
COMP
0.7MA
3 COMP INPUT
5V
BAND GAP
REFERENCE
©2003 Fairchild Semiconductor Corporation
8 C1
9 E1
11 C2
10 E2
12 VCC
14 VREF
7 GND
Rev. 1.0.1

1 page




KA7500C pdf
Typical Application
Pulse Width Modulated Step-down Converter
VI =10V to 40V
KSA1010
KA7500C
1mH, 2A
VO=5V
IO=1A
47
150
0.1uF
1M
50uF
10V +
12
VCC
11 8 3
- 2 5.1K
C2 C1 COMP INPUT
VREF 14
KA7500C
5.1K
- 15
+1
150
D.T GND E1
E2
O.C
RT
+ 16
CT
4 7 9 10 13 6 5
5.1K
+
50uF
50V
47K
+
0.001uF
500uF
10V
+
GND
0.1
5

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