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PDF K4F171612D Data sheet ( Hoja de datos )

Número de pieza K4F171612D
Descripción 1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
Fabricantes Samsung 
Logotipo Samsung Logotipo



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K4F171611D, K4F151611D
K4F171612D, K4F151612D
CMOS DRAM
1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 1,048,576 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-50 or -60), power
consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This
1Mx16 Fast Page Mode DRAM family is fabricated using Samsungs advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
• Part Identification
- K4F171611D-J(T) (5V, 4K Ref.)
- K4F151611D-J(T) (5V, 1K Ref.)
- K4F171612D-J(T) (3.3V, 4K Ref.)
- K4F151612D-J(T) (3.3V, 1K Ref.)
Active Power Dissipation
Speed
-50
-60
3.3V
4K 1K
324 504
288 468
Unit : mW
5V
4K 1K
495 770
440 715
Refresh Cycles
Part VCC Refresh Refresh period
NO. cycle Normal L-ver
K4F171611D
K4F171612D
K4F151611D
K4F151612D
5V
3.3V
5V
3.3V
4K
1K
64ms
16ms
128ms
Perfomance Range
Speed tRAC
-50 50ns
tCAC
15ns
-60 60ns 15ns
tRC
90ns
110ns
tPC
35ns
40ns
Remark
5V/3.3V
5V/3.3V
• Fast Page Mode operation
• 2 CAS Byte/Word Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 42-pin SOJ 400mil and 50(44)-pin TSOP(II)
400mil packages
• Single +5V±10% power supply (5V product)
• Single +3.3V±0.3V power supply (3.3V product)
FUNCTIONAL BLOCK DIAGRAM
RAS
UCAS
LCAS
W
A0-A11
(A0 - A9)*1
A0 - A7
(A0 - A9)*1
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Memory Array
1,048,576 x16
Cells
Column Decoder
Vcc
Vss
Lower
Data in
Buffer
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
Note) *1 : 1K Refresh
DQ0
to
DQ7
OE
DQ8
to
DQ15
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.

1 page




K4F171612D pdf
K4F171611D, K4F151611D
K4F171612D, K4F151612D
CAPACITANCE (TA=25°C, VCC=5V or 3.3V, f=1MHz)
Parameter
Symbol
Input capacitance [A0 ~ A11]
CIN1
Input capacitance [RAS, UCAS, LCAS, W, OE]
CIN2
Output capacitance [DQ0 - DQ15]
CDQ
Min
-
-
-
CMOS DRAM
Max
5
7
7
Units
pF
pF
pF
AC CHARACTERISTICS (0°CTA70°C, See note 1,2)
Test condition (5V device) : VCC=5.0V±10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V
Test condition (3.3V device) : VCC=3.3V±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-50
Min Max
Random read or write cycle time
tRC 90
Read-modify-write cycle time
tRWC
133
Access time from RAS
tRAC
50
Access time from CAS
tCAC
15
Access time from column address
tAA
25
CAS to output in Low-Z
tCLZ
0
Output buffer turn-off delay
tOFF 0 13
Transition time (rise and fall)
tT 3 50
RAS precharge time
tRP 30
RAS pulse width
tRAS
50 10K
RAS hold time
tRSH
13
CAS hold time
tCSH
50
CAS pulse width
tCAS
13 10K
RAS to CAS delay time
tRCD 20 37
RAS to column address delay time
tRAD 15 25
CAS to RAS precharge time
tCRP
5
Row address set-up time
tASR
0
Row address hold time
tRAH
10
Column address set-up time
tASC
0
Column address hold time
tCAH
10
Column address to RAS lead time
tRAL
25
Read command set-up time
tRCS
0
Read command hold time referenced to CAS tRCH
0
Read command hold time referenced to RAS tRRH
0
Write command hold time
tWCH
10
Write command pulse width
tWP 10
Write command to RAS lead time
tRWL
13
Write command to CAS lead time
tCWL
13
-60
Min Max
110
155
60
15
30
0
0 15
3 50
40
60 10K
15
60
15 10K
20 45
15 30
5
0
10
0
10
30
0
0
0
10
10
15
15
Units Notes
ns
ns
ns 3,4,10
ns 3,4,5
ns 3,10
ns 3
ns 6
ns 2
ns
ns
ns
ns
ns
ns 4
ns 10
ns
ns
ns
ns 11
ns 11
ns
ns
ns 8
ns 8
ns
ns
ns
ns

5 Page





K4F171612D arduino
K4F171611D, K4F151611D
K4F171612D, K4F151612D
UPPER BYTE READ CYCLE
NOTE : DIN = OPEN
VIH -
RAS
VIL -
VIH -
UCAS
VIL -
VIH -
LCAS
VIL -
VIH -
A
VIL -
VIH -
W
VIL -
VIH -
OE
VIL -
DQ0 ~ DQ7
VOH -
VOL -
DQ8 ~ DQ15
VOH -
VOL -
tRAS
tRC
tCRP
tCRP
tRCD
tCSH
tRSH
tCAS
tRAD
tASR tRAH
ROW
ADDRESS
tASC
tRCS
tCAH
COLUMN
ADDRESS
tRAL
tAA
tOEA
OPEN
tRAC
OPEN
tCAC
tCLZ
CMOS DRAM
tRP
tCRP
tRPC
tRRH
tRCH
tOFF
tOEZ
DATA-OUT
Dont care
Undefined

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