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PDF K4E661612D Data sheet ( Hoja de datos )
| Número de pieza | K4E661612D | |
| Descripción | CMOS DRAM | |
| Fabricantes | Samsung | |
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Industrial Temperature
K4E661612D,K4E641612D
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption( Nor-
mal or Low power) are optional features of this family. All of this family have C A S -before-R A S refresh, R A S -only refresh and Hidden
refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated
u s i n g S a m s u n g ′s a d v a n c e d C M O S p r o c e s s t o r e a l i z e h i g h b a n d - w i d t h , l o w p o w e r c o n s u m p t i o n a n d h i g h r e l i a b i l i t y .
FEATURES
• Part Identification
- K4E661612D-TI/P(3.3V, 8K Ref.)
- K4E641612D-TI/P(3.3V, 4K Ref.)
• Active Power Dissipation
Speed
-45
-50
-60
8K
324
288
252
Unit : m W
4K
468
432
396
• Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
L-ver
K4E661612D*
8K
64ms
128ms
K4E641612D
4K
* Access mode & R A S only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
C A S - b e f o r e -R A S & H i d d e n r e f r e s h m o d e
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
• Performance Range
Speed
-45
tR A C
45ns
tC A C
12ns
-50
50ns
13ns
-60
60ns
15ns
tRC
74ns
84ns
104ns
tH P C
17ns
20ns
25ns
• Extended Data Out Mode operation
• 2 CAS Byte/Word Read/Write operation
• C A S-before-R A S refresh capability
• R A S-only and Hidden refresh capability
• Fast parallel test mode capability
• Self-refresh capability (L-ver only)
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic TSOP(II) packages
• +3.3V ±0.3V power supply
• Industrial Temperature operating ( - 4 0 ~ 8 5°C )
FUNCTIONAL BLOCK DIAGRAM
RAS
UCAS
LCAS
W
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Row Address Buffer
Col. Address Buffer
Note) *1 : 4K Refresh
Row Decoder
Memory Array
4,194,304 x 16
Cells
Column Decoder
Vcc
Vss
Lower
Data in
Buffer
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
DQ0
to
DQ7
OE
D Q8
to
DQ15
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
1 page  
Industrial Temperature
K4E661612D,K4E641612D
C A P A C I T A N C E (T A= 2 5 °C, V CC =3.3V, f=1MHz)
Parameter
Symbol
Input capacitance [A0 ~ A12]
C IN1
I n p u t c a p a c i t a n c e [R A S , U C A S , L C A S , W , O E ]
C IN2
Output capacitance [DQ0 - DQ15]
C DQ
Min
-
-
-
CMOS DRAM
Max
5
7
7
Units
pF
pF
pF
A C C H A R A C T E R I S T I C S (-40°C ≤T A≤85°C , S e e n o t e 2 )
Test condition : V CC = 3 . 3 V ±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-45
Min Max
Random read or write cycle time
tRC
74
Read-modify-write cycle time
tRWC
101
Access time fromRAS
Access time fromCAS
tRAC
tCAC
45
12
Access time from column address
tAA 2 3
C A S to output in Low-Z
tCLZ
3
Output buffer turn-off delay from CAS
tCEZ
3 13
O E to output in Low-Z
tOLZ
3
Transition time (rise and fall)
R A S precharge time
tT
tR P
1 50
25
R A S pulse width
tRAS
45 10K
RAS hold time
tRSH
8
CAS hold time
tCSH
35
C A S pulse width
tCAS
7 5K
R A S to C A S delay time
RAS to column address delay time
tRCD
tRAD
11 3 3
9 22
C A S to R A S precharge time
tCRP
5
Row address set-up time
tASR
0
Row address hold time
tRAH
7
Column address set-up time
Column address hold time
tASC
tCAH
0
7
Column address to RAS lead time
tRAL
23
Read command set-up time
tRCS
0
Read command hold time referenced to CAS
tRCH
0
Read command hold time referenced to RAS
tRRH
0
Write command hold time
Write command pulse width
tWCH
tW P
7
6
Write command to RAS lead time
tRWL
8
Write command to CAS lead time
tCWL
7
Data set-up time
tD S
0
-50
Min
Max
84
113
50
13
25
3
3 13
3
1 50
30
50 10K
8
38
8 10K
1 1 37
9 25
5
0
7
0
7
25
0
0
0
7
7
8
7
0
-60
Min
Max
104
138
60
15
30
3
3 13
3
1 50
40
60 10K
10
40
10 10K
14 4 5
12 3 0
5
0
10
0
10
30
0
0
0
10
10
10
10
0
Unit
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
3,4,10
3,4,5
3,10
3
6,20
3
2
4
10
13
13
8
8
16
9,19
5 Page 
Industrial Temperature
K4E661612D,K4E641612D
LOWER BYTE READ CYCLE
N O T E : D IN = O P E N
CMOS DRAM
V IH -
RAS
V IL -
V IH -
UCAS
V IL -
V IH -
LCAS
V IL -
V IH -
A
V IL -
V IH -
W
V IL -
V IH -
OE
V IL -
DQ0 ~ DQ7
V OH -
V OL -
DQ8 ~ DQ15
V OH -
V OL -
tRAS
tRC
tC R P
tC R P
tRCD
tASR
tR A D
tRAH
tASC
ROW
ADDRESS
tRCS
tCSH
tR S H
tC A S
tC A H
COLUMN
ADDRESS
tR A L
tAA
tRAC
OPEN
tOEA
tCAC
t CLZ
tO L Z
OPEN
tRP
tR P C
tR R H
tRCH
tC E Z
tO E Z
DATA-OUT
D o n ′t c a r e
Undefined
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet K4E661612D.PDF ] | |
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