DataSheet.es    


PDF K4E640812B Data sheet ( Hoja de datos )

Número de pieza K4E640812B
Descripción 8M x 8bit CMOS Dynamic RAM with Extended Data Out
Fabricantes Samsung 
Logotipo Samsung Logotipo



Hay una vista previa y un enlace de descarga de K4E640812B (archivo pdf) en la parte inferior de esta página.


Total 21 Páginas

No Preview Available ! K4E640812B Hoja de datos, Descripción, Manual

K4E660812B, K4E640812B
CMOS DRAM
8M x 8bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 8,388,608 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-
mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden
refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 8Mx8 EDO Mode DRAM family is fabricated using
Samsungs advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Part Identification
- K4E660812B-JC/L(3.3V, 8K Ref., SOJ)
- K4E640812B-JC/L(3.3V, 4K Ref., SOJ)
- K4E660812B-TC/L(3.3V, 8K Ref., TSOP)
- K4E640812B-TC/L(3.3V, 4K Ref., TSOP)
Active Power Dissipation
Speed
-45
-50
-60
8K
360
324
288
Unit : mW
4K
468
432
396
Refresh Cycles
Part
NO.
K4E660812B*
K4E640812B
Refresh
cycle
8K
4K
Refresh time
Normal L-ver
64ms 128ms
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
¡Ü Performance Range
Speed
-45
tRAC
45ns
tCAC
12ns
-50 50ns 13ns
-60 60ns 15ns
tRC
74ns
84ns
104ns
tHPC
17ns
20ns
25ns
• Extended Data Out Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• +3.3V±0.3V power supply
FUNCTIONAL BLOCK DIAGRAM
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Refresh Timer
Refresh Control
Refresh Counter
A0~A12
(A0~A11)*1
A0~A9
(A0~A10)*1
Row Address Buffer
Col. Address Buffer
Note) *1 : 4K Refresh
Row Decoder
Memory Array
8,388,608 x 8
Cells
Column Decoder
Data in
Buffer
Data out
Buffer
DQ0
to
DQ7
OE
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.

1 page




K4E640812B pdf
K4E660812B, K4E640812B
CAPACITANCE (TA=25°C, VCC=3.3V, f=1MHz)
Parameter
Symbol
Input capacitance [A0 ~ A12]
CIN1
Input capacitance [RAS, CAS, W, OE]
CIN2
Output capacitance [DQ0 - DQ7]
CDQ
Min
-
-
-
CMOS DRAM
Max Units
5 pF
7 pF
7 pF
AC CHARACTERISTICS (0°CTA70°C, See note 1,2)
Test condition : VCC=3.3V±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-45
Min Max
Random read or write cycle time
tRC 74
Read-modify-write cycle time
Access time from RAS
tRWC
tRAC
101
45
Access time from CAS
tCAC
12
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay from CAS
tAA
tCLZ
tCEZ
23
3
3 13
OE to output in Low-Z
tOLZ
3
Transition time (rise and fall)
RAS precharge time
tT 1 50
tRP 25
RAS pulse width
tRAS
45 10K
RAS hold time
CAS hold time
CAS pulse width
tRSH
tCSH
tCAS
8
35
7 5K
RAS to CAS delay time
tRCD
11 33
RAS to column address delay time
CAS to RAS precharge time
Row address set-up time
tRAD
tCRP
tASR
9 22
5
0
Row address hold time
tRAH
7
Column address set-up time
Column address hold time
Column address to RAS lead time
tASC
tCAH
tRAL
0
7
23
Read command set-up time
Read command hold time referenced to CAS
Read command hold time referenced to RAS
Write command hold time
tRCS
tRCH
tRRH
tWCH
0
0
0
7
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Data set-up time
tWP
tRWL
tCWL
tDS
6
8
7
0
-50
Min Max
84
113
50
13
25
3
3 13
3
1 50
30
50 10K
8
38
8 10K
11 37
9 25
5
0
7
0
7
25
0
0
0
7
7
8
7
0
-60
Min Max
104
138
60
15
30
3
3 13
3
1 50
40
60 10K
10
40
10 10K
14 45
12 30
5
0
10
0
10
30
0
0
0
10
10
10
10
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
3,4,10
3,4,5
3,10
3
6,14
3
2
4
10
8
8
9

5 Page





K4E640812B arduino
K4E660812B, K4E640812B
WRITE CYCLE ( OE CONTROLLED WRITE )
NOTE : DOUT = OPEN
VIH -
RAS
VIL -
VIH -
CAS
VIL -
VIH -
A
VIL -
VIH -
W
VIL -
VIH -
OE
VIL -
DQ0 ~ DQ3(7)
VIH -
VIL -
tRAS
tRC
tCRP
tRCD
tRAD
tASR tRAH
ROW
ADDRESS
tASC
tCSH
tRSH
tCAS
tRAL
tCAH
COLUMN
ADDRESS
tCWL
tRWL
tWP
tOED
tDS
tOEH
tDH
DATA-IN
CMOS DRAM
tRP
tCRP
Dont care
Undefined

11 Page







PáginasTotal 21 Páginas
PDF Descargar[ Datasheet K4E640812B.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
K4E640812B8M x 8bit CMOS Dynamic RAM with Extended Data OutSamsung
Samsung
K4E640812C8M x 8bit CMOS Dynamic RAM with Extended Data OutSamsung
Samsung
K4E640812E(K4E640812E / K4E660812E) 8M x 8bit CMOS Dynamic RAM with Extended Data OutSamsung semiconductor
Samsung semiconductor

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar