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PDF K4D263238M Data sheet ( Hoja de datos )
| Número de pieza | K4D263238M | |
| Descripción | 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL | |
| Fabricantes | Samsung | |
| Logotipo |  |
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K4D263238M
128M DDR SDRAM
128Mbit DDR SDRAM
1M x 32Bit x 4 Banks
Double Data Rate Synchronous RAM
with Bi-directional Data Strobe and DLL
Revision 1.3
August 2001
Samsung Electronics reserves the right to change products or specification without notice.
-1-
Rev. 1.3 (Aug. 2001)
1 page  
K4D263238M
PIN CONFIGURATION (Top View)
128M DDR SDRAM
DQ29
VSSQ
DQ30
DQ31
VSS
VDDQ
N.C
N.C
N.C
N.C
N.C
VSSQ
RFU
DQS
VDDQ
VDD
DQ0
DQ1
VSSQ
DQ2
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
100 Pin TQFP
20 x 14 mm2
0.65mm pin Pitch
50 A7
49 A6
48 A5
47 A4
46 VSS
45 A9
44 N.C
43 N.C
42 N.C
41 N.C
40 N.C
39 N.C
38 N.C
37 A11
36 A10
35 VDD
34 A3
33 A2
32 A1
31 A0
PIN DESCRIPTION
CK,CK
CKE
CS
RAS
CAS
WE
DQS
DMi
RFU
Differential Clock Input
Clock Enable
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Data Strobe
Data Mask
Reserved for Future Use
BA0, BA1
A0 ~A11
DQ0 ~ DQ31
VDD
VSS
VDDQ
VSSQ
MCL
-5-
Bank Select Address
Address Input
Data Input/Output
Power
Ground
Power for DQ′s
Ground for DQ′s
Must Connect Low
Rev. 1.3 (Aug. 2001)
5 Page 
K4D263238M
128M DDR SDRAM
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on VDD supply relative to Vss
Voltage on VDD supply relative to Vss
Storage temperature
Power dissipation
Short circuit current
Symbol
VIN, VOUT
VDD
VDDQ
TSTG
PD
IOS
Value
-0.5 ~ 3.6
-1.0 ~ 3.6
-0.5 ~ 3.6
-55 ~ +150
2.0
50
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Unit
V
V
V
°C
W
mA
POWER & DC OPERATING CONDITIONS(SSTL_2 In/Out)
Recommended operating conditions(Voltage referenced to VSS=0V, TA=0 to 65°C)
Parameter
Device Supply voltage
Symbol
Min
Typ Max
VDD 2.375 2.50 2.625
Output Supply voltage
VDDQ
2.375
2.50
2.625
Reference voltage
Termination voltage
VREF
Vtt
0.49*VDDQ
VREF-0.04
-
VREF
0.51*VDDQ
VREF+0.04
Input logic high voltage
VIH VREF+0.15 - VDDQ+0.30
Input logic low voltage
VIL -0.30
- VREF-0.15
Output logic high voltage
VOH Vtt+0.76
-
-
Output logic low voltage
VOL
-
- Vtt-0.76
Input leakage current
IIL -5 - 5
Output leakage current
IOL -5
-
5
Unit
V
V
V
V
V
V
V
V
uA
uA
Note
1
1
2
3
4
5
IOH=-15.2mA
IOL=+15.2mA
6
6
Note : 1. Under all conditions VDDQ must be less than or equal to VDD.
2. VREF is expected to equal 0.50*VDDQ of the transmitting device and to track variations in the DC level of the same. Peak to
peak noise on the VREF may not exceed + 2% of the DC value. Thus, from 0.50*VDDQ, VREF is allowed + 25mV for DC error
and an additional + 25mV for AC noise.
3. Vtt of the transmitting device must track VREF of the receiving device.
4. VIH(max.)= VDDQ +1.5V for a pulse and it which can not be greater than 1/3 of the cycle rate.
5. VIL(min.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
6. For any pin under test input of 0V ≤ VIN ≤ VDD is acceptable. For all other pins that are not under test VIN=0V.
- 11 -
Rev. 1.3 (Aug. 2001)
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet K4D263238M.PDF ] | |
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