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PDF M54HC283 Data sheet ( Hoja de datos )
| Número de pieza | M54HC283 | |
| Descripción | 4 BIT BINARY FULL ADDER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M54HC283
M74HC283
. HIGH SPEED
tPD = 17 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. FULL-CARRY LOOK-AHEAD ACROSS THE
FOUR BITS
. PARTIAL LOOK-AHEAD WITHTHE ECONOMY
OF RIPPLY CARRY
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS283
4 BIT BINARY FULL ADDER
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 28 3F 1R
M 74H C2 83 M1 R
M 74HC 28 3B 1R
M 74H C2 83 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC283 is a high speed CMOS 4-BIT BI-
NARY FULL ADDER fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
Sum (Σ) outputs are provided for each bit and a re-
sultant carry (C4) is obtained from the fourth bit. This
adder features full internal look ahead across all four
bits. A 4 x n binary adder is easily built up by cas-
cading without any additional logic.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
October 1992
NC =
No Internal
Connection
1/10
1 page  
M54/M74HC283
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tTLH Output Transition 2.0
tTHL Time
4.5
30 75
8 15
95 110
19 22 ns
6.0 7 13 16 19
tPLH Propagation
tPHL Delay Time
(An, Bn - Σn)
2.0
4.5
6.0
95 210 265 315
27 42 53 63 ns
22 36 45 54
tPLH Propagation
tPHL Delay Time
(An, Bn - C4)
2.0
4.5
6.0
80 195 245 295
25 39 49 59 ns
20 33 42 50
tPLH Propagation
tPHL Delay Time
(C0 - Σn)
2.0
4.5
6.0
60 150 190 225
20 30 38 45 ns
17 26 32 38
tPLH Propagation
tPHL Delay Time
(C0 - C4)
2.0
4.5
6.0
60 150 190 225
20 30 38 45 ns
17 26 32 38
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
126
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC
SWITCHING CHARACTERISTICS
TEST WAVEFORM
TEST CIRCUIT ICC (Opr.)
INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF
SWITCHING CHARACTERISTICSTEST.
5/10
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet M54HC283.PDF ] | |
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