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PDF M54HC164 Data sheet ( Hoja de datos )
| Número de pieza | M54HC164 | |
| Descripción | 8 BIT SIPO SHIFT REGISTER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M54HC164 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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. HIGH SPEED
tPD = 15 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. SYMMETRICAL OUTPUT IMPEDANCE
IOL = IOH = 4 mA (MIN.)
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS164
M54HC164
M74HC164
8 BIT SIPO SHIFT REGISTER
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 16 4F 1R
M 74H C1 64 M1 R
M 74HC 16 4B 1R
M 74H C1 64 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC164 is a high speed CMOS 8 BIT
SIPO SHIFT REGISTER fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
The HC164 is an 8 bit shift register with serial data
entry and an output from each of the eight stages.
Data is entered serially through one of two inputs (A
or B), either of these inputs can be used as an active
high enable for data entry through the other input.
An unused input must be high, or both inputs con-
nected together. Each low-to-high transition on the
clock input shifts data one place to the right and
enters into QA, the logic NAND of the two data inputs
(A ⋅ B), the data that existed before the rising clock
edge. A low level on the clear input overrides all
other inputs and clears the register asynchronously,
forcing all Q outputs low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
October 1992
NC =
No Internal
Connection
1/12
1 page  
M54/M74HC164
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tTLH Output Transition 2.0
tTHL Time
4.5
30 75
8 15
95 110
19 22 ns
6.0 7 13 16 19
tPLH Propagation
tPHL Delay Time
(CLOCK - Q)
2.0
4.5
6.0
57 160 200 240
19 32 40 48 ns
16 27 34 41
tPHL Propagation
Delay Time
(CLEAR - Q)
2.0
4.5
6.0
60 175 220 265
20 35 44 53 ns
17 30 37 45
fMAX Maximum Clock 2.0
Frequency
4.5
6.2 18
31 53
5.0 4.2
25 21 MHz
6.0 37 62 30 25
tW(H)
tW(L)
Minimum Pulse
Width
(CLOCK)
2.0
4.5
6.0
24 75
6 15
5 13
95 110
19 22 ns
16 19
tW(L) Minimum Pulse
Width
(CLEAR)
2.0
4.5
6.0
40 75
10 15
9 13
95 110
19 22 ns
16 19
ts Minimum Set-up 2.0
Time
4.5
(A, B - CK)
6.0
16 50 65 75
4 10 13 15 ns
39
11 13
th Minimum Hold 2.0
Time
4.5
(A, B - CK)
6.0
555
5 5 5 ns
555
tREM Minimum
Removal Time
2.0
4.5
555
5 5 5 ns
6.0 5 5 5
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
99
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC
5/12
5 Page 
DIM.
A
B
D
d1
d2
E
e
e3
F
G
M
M1
M54/M74HC164
MIN.
9.78
8.89
4.2
7.37
PLCC20 MECHANICAL DATA
mm
TYP.
2.54
0.56
1.27
5.08
0.38
1.27
1.14
MAX.
10.03
9.04
4.57
MIN.
0.385
0.350
0.165
8.38 0.290
0.101
inch
TYP.
0.100
0.022
0.050
0.200
0.015
0.050
0.045
MAX.
0.395
0.356
0.180
0.330
0.004
P027A
11/12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet M54HC164.PDF ] | |
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