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PDF M54HC10 Data sheet ( Hoja de datos )
| Número de pieza | M54HC10 | |
| Descripción | TRIPLE 3-INPUT NAND GATE | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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M54HC10
M74HC10
. HIGH SPEED
tPD = 6 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 1 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS10
TRIPLE 3-INPUT NAND GATE
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC10F1R
M 74H C1 0M 1R
M 74HC 10 B1 R
M 74H C1 0C 1R
DESCRIPTION
The M54/74HC10 is a high speed CMOS TRIPLE
3-INPUT NAND GATE fabricated with silicon gate
C2MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The internal circuit is composed of 3 stages includ-
ing buffer output, which enables high noise im-
munity and stable output.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN CONNECTIONS (top view)
December 1992
NC =
No Internal
Connection
1/9
1 page  
DIM.
a1
B
b
b1
D
E
e
e3
F
I
L
Z
M54/M74HC10
Plastic DIP14 MECHANICAL DATA
MIN.
0.51
1.39
1.27
mm
TYP.
0.5
0.25
8.5
2.54
15.24
3.3
MAX.
1.65
20
7.1
5.1
2.54
MIN.
0.020
0.055
0.050
inch
TYP.
0.020
0.010
0.335
0.100
0.600
0.130
MAX.
0.065
0.787
0.280
0.201
0.100
P001A
5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet M54HC10.PDF ] | |
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