PDF M50FW016 Data sheet ( Hoja de datos )

Número de pieza	M50FW016
Descripción	16 Mbit 2Mb x8/ Uniform Block 3V Supply Firmware Hub Flash Memory
Fabricantes	ST Microelectronics
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M50FW016 16 Mbit (2Mb x8, Uniform Block) 3V Supply Firmware Hub Flash Memory PRELIMINARY DATA s SUPPLY VOLTAGE – VCC = 3 V to 3.6 V for Program, Erase and Read Operations – VPP = 12 V for Fast Program and Fast Erase s TWO INTERFACES – Firmware Hub (FWH) Interface for embedded operation with PC Chipsets – Address/Address Multiplexed (A/A Mux) In- terface for programming equipment compati- bility s FIRMWARE HUB (FWH) HARDWARE INTERFACE MODE – 5 Signal Communication Interface supporting Read and Write Operations – Hardware Write Protect Pins for Block Pro- tection – Register Based Read and Write Protection – 5 Additional General Purpose Inputs for plat- form design flexibility – Multi-byte Read Operation (4/16/128-byte) – Synchronized with 33 MHz PCI clock s BYTE PROGRAMMING TIME – Single Byte Mode: 10µs (typical) – Quadruple Byte Mode: 2.5µs (typical) s 32 UNIFORM 64 Kbyte MEMORY BLOCKS s PROGRAM and ERASE SUSPEND – Read other Blocks during Program/Erase Suspend – Program other Blocks during Erase Suspend s FOR USE in PC BIOS APPLICATIONS s ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Device Code: 2Eh TSOP40 (N) 10 x 20mm Figure 1. Logic Diagram (FWH Interface) VCC VPP ID0-ID3 FGPI0- FGPI4 4 5 FWH4 CLK IC RP INIT M50FW016 4 FWH0- FWH3 WP TBL VSS AI04462 February 2003 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/37 1 page M50FW016 Table 3. Absolute Maximum Ratings (1) Symbol Parameter Value Unit Ambient Operating Temperature (Temperature Range Option 1) 0 to 70 TA Ambient Operating Temperature (Temperature Range Option 5) –20 to 85 °C °C TBIAS Temperature Under Bias –50 to 125 °C TSTG Storage Temperature –65 to 150 °C VIO (2) Input or Output Voltage –0.6 to VCC + 0.6 V VCC Supply Voltage –0.6 to 4 V VPP Program Voltage –0.6 to 13 V Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi- tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual- ity documents. 2. Minimum Voltage may undershoot to –2V, for less than 20 ns, during transitions. Maximum Voltage may overshoot to VCC+2V, for less than 20 ns, during transitions. Ready/Busy Output (RB). The Ready/Busy pin gives the status of the memory’s Program/Erase Controller. When Ready/Busy is Low, VOL, the memory is busy with a Program or Erase operation and it will not accept any additional Program or Erase command except the Program/Erase Suspend command. When Ready/Busy is High, VOH, the memory is ready for any Read, Program or Erase operation. Supply Signal Descriptions The Supply Signals are the same for both interfac- es. VCC Supply Voltage. The VCC Supply Voltage supplies the power for all operations (Read, Pro- gram, Erase etc.). The Command Interface is disabled when the VCC Supply Voltage is less than the Lockout Voltage, VLKO. This prevents Bus Write operations from accidentally damaging the data during power up, power down and power surges. If the Program/ Erase Controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. After VCC becomes valid the Command Interface is reset to Read mode. A 0.1µF capacitor should be connected between the VCC Supply Voltage pins and the VSS Ground pin to decouple the current surges from the power supply. Both VCC Supply Voltage pins must be connected to the power supply. The PCB track widths must be sufficient to carry the currents required during program and erase operations. VPP Optional Supply Voltage. The VPP Optional Supply Voltage pin is used to select the Fast Program (see the Quadruple Byte Program Command description) and Fast Erase options of the memory and to protect the memory. When VPP < VPPLK Program and Erase operations cannot be performed and an error is reported in the Status Register if an attempt to change the memory contents is made. When VPP = VCC Program and Erase operations take place as normal. When VPP = VPPH Fast Program operations (using the Quadruple Byte Program command, 30h, from Table 13) and Fast Erase operations are used. Any other voltage input to VPP will result in undefined behavior and should not be used. VPP should not be set to VPPH for more than 80 hours during the life of the memory. VSS Ground. VSS is the reference for all the volt- age measurements. 5/37 5 Page Table 8. A/A Mux Bus Operations Operation GW Bus Read VIL VIH Bus Write VIH VIL Output Disable VIH VIH Reset VIL or VIH VIL or VIH Table 9. Manufacturer and Device Codes Operation GW Manufacturer Code VIL VIH Device Code VIL VIH RP VIH VIH VIH VIL RP VIH VIH VPP Don’t Care VCC or VPPH Don’t Care Don’t Care M50FW016 DQ7-DQ0 Data Output Data Input Hi-Z Hi-Z A20-A1 A0 DQ7-DQ0 VIL VIL 20h VIL VIH 2Eh COMMAND INTERFACE All Bus Write operations to the memory are interpreted by the Command Interface. Commands consist of one or more sequential Bus Write operations. After power-up or a Reset operation the memory enters Read mode. The commands are summarized in Table 11, Commands. Refer to Table 11 in conjunction with the text descriptions below. Read Memory Array Command. The Read Mem- ory Array command returns the memory to its Read mode where it behaves like a ROM or EPROM. One Bus Write cycle is required to issue the Read Memory Array command and return the memory to Read mode. Once the command is is- sued the memory remains in Read mode until an- other command is issued. From Read mode Bus Read operations will access the memory array. While the Program/Erase Controller is executing a Program or Erase operation the memory will not accept the Read Memory Array command until the operation completes. Read Status Register Command. The Read Sta- tus Register command is used to read the Status Register. One Bus Write cycle is required to issue the Read Status Register command. Once the command is issued subsequent Bus Read opera- tions read the Status Register until another com- mand is issued. See the section on the Status Register for details on the definitions of the Status Register bits. Read Electronic Signature Command. The Read Electronic Signature command is used to read the Manufacturer Code and the Device Code. One Bus Write cycle is required to issue the Read Electronic Signature command. Once the command is issued subsequent Bus Read operations read the Manufacturer Code or the Device Code until another command is issued. After the Read Electronic Signature Command is issued the Manufacturer Code and Device Code can be read using Bus Read operations using the addresses in Table 10. Program Command. The Program command can be used to program a value to one address in the memory array at a time. Two Bus Write operations are required to issue the command; the second Bus Write cycle latches the address and data in the internal state machine and starts the Program/Erase Controller. Once the command is issued subsequent Bus Read operations read the Status Register. See the section on the Status Register for details on the definitions of the Status Register bits. If the address falls in a protected block then the Program operation will abort, the data in the memory array will not be changed and the Status Register will output the error. During the Program operation the memory will only accept the Read Status Register command and the Program/Erase Suspend command. All other commands will be ignored. Typical Program times are given in Table 12. Note that the Program command cannot change a bit set at ‘0’ back to ‘1’ and attempting to do so will not cause any modification on its value. One of the Erase commands must be used to set all of the bits in the block to ‘1’. See Figure 14, Program Flowchart and Pseudo Code, for a suggested flowchart on using the Program command. Quadruple Byte Program Command (A/A Mux Mode). The Quadruple Byte Program Command can be used to program four adjacent bytes in the memory array at a time. The four bytes must differ only for the addresses A0 and A1. Programming 11/37 11 Page

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