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PDF M54HC280 Data sheet ( Hoja de datos )
| Número de pieza | M54HC280 | |
| Descripción | 9 BIT PARITY GENERATOR | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M54HC280 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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. HIGH SPEED
tPD = 22 ns (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 °C 6 V
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS280
M54HC280
M74HC280
9 BIT PARITY GENERATOR
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 28 0F 1R
M 74H C2 80 M1 R
M 74HC 28 0B 1R
M 74H C2 80 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC280 is a high speed CMOS 9-BIT
PARITY GENERATOR fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
consumption.
It is composed of nine data inputs (A to I) and
odd/even parity outputs (Σ ODD and Σ EVEN). The
nine data inputs control the output conditions. When
the number of high level inputs is odd, ΣODD output
is kept high and ΣEVEN output low. Conversely,
when the number is even , ΣEVEN output is kept
high and ΣODD low.
This IC generates either odd or even parity making
it flexible application.
The word-length capability is easily expanded by
cascading.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
October 1992
NC =
No Internal
Connection
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1 page  
M54/M74HC280
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
Value
-40 to 85 oC
74HC
Min. Max.
-55 to 125 oC
54HC
Min. Max.
Unit
tTLH Output Transition 2.0
tTHL Time
4.5
30 75
8 15
95 110
19 22 ns
6.0 7 13 16 19
tPLH Propagation
tPHL Delay Time
(CLOCK - Q)
2.0
4.5
6.0
80 200 250 290
26 40 50 58 ns
22 34 43 49
CIN Input Capacitance
5 10 10 10 pF
CPD (*) Power Dissipation
Capacitance
61
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC
SWITCHING CHARACTERISTICS TEST
WAVEFORM
TEST CIRCUIT ICC (Opr.)
INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF
SWITCHING CHARACTERISTICSTEST.
5/10
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet M54HC280.PDF ] | |
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