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Número de pieza TDA4881
Descripción Advanced monitor video controller
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
DATA SHEET
TDA4881
Advanced monitor video controller
Preliminary specification
File under Integrated Circuits, IC02
November 1992

1 page




TDA4881 pdf
Philips Semiconductors
Advanced monitor video controller
Preliminary specification
TDA4881
FUNCTIONAL DESCRIPTION
RGB input signals (0.7 V(p-p)) are capacitively coupled into
the TDA4881 (pins 2, 5 and 8) from a low ohmic source
and are clamped to an internal DC voltage (artificial black
level). Composite signals will not disturb normal
operations because an internal clipping circuit cuts all
signal parts below black level. Channels 1 and 3 have a
maximum total voltage gain of 6 dB (maximum contrast
and maximum individual channel gain), Channel 2 of 4 dB
(maximum contrast and nominal channel gain). With the
nominal channel gain of 1 dB and nominal contrast setting
the nominal black-to-white output amplitude is 0.8 V(p-p).
DC voltages are used for brightness, contrast and gain
control.
Brightness control yields a simultaneous signal black level
shift of the three channels relative to a reference black
level. For nominal brightness (pin 1 open-circuit) the signal
black level is equal to the reference black level.
Contrast control is achieved by a voltage at pin 6 and
affects the three channels simultaneously.
To provide the correct white point, an individual gain
control (pins 3 and 11) adjusts the signals of Channels 1
and 3 compared to the reference Channel 2. Gain setting
effects contrast and brightness to achieve correct grey
scale tracking. Each output stage provides a current
output (pins 20, 17 and 14) and a voltage output (pins 19,
16 and 13). External cascode transistors reduce power
consumption of the IC and prevent breakdown of the
output transistors. Signal output currents and peaking
characteristics are determined by external components at
the voltage outputs and the video supply. The three
channels have separate internal feedback loops which
ensure large signal linearity and marginal signal distortion
in spite of output transistor thermal VBE variation.
The clamping pulse (pin 10) is used for input clamping
only. The input signals have to be at black level during the
clamping pulse and are clamped to an internal artificial
black level. The coupling capacitors are used in this way
for black level storage. Because the threshold for the
clamping pulse is higher than that for vertical blanking (pin
10) the rise and fall times of the clamping pulse have to be
faster than 75 ns/V (1 V to 3.5 V).
The vertical blanking pulse will be detected if the input
voltage (pin 10) is higher than the threshold voltage for
approximately 300 ns but does not exceed the threshold
for the clamping pulse in the time between. During the
vertical blanking pulse the input clamping is disabled to
avoid misclamping in the event of composite input signals.
The input signal is blanked and the artificial black level is
inserted instead. Additionally the brightness is internally
set to its nominal value, thus the output signal is at
reference black level. The DC value of the reference black
level will be adjusted by cut-off stabilization.
During horizontal blanking (pin 9) the output signal is set to
reference black level as previously described and output
clamping is activated. If the voltage at pin 9 exceeds the
switch off threshold the signal is blanked and switched to
ultra black level for screen protection and spot
suppression during V-flyback. Ultra black level is the
lowest possible output voltage (at voltage outputs) and
does not depend on cut-off stabilization.
For cut-off stabilization (DC coupling to the CRT)
respectively black level stabilization (AC coupling) the
video signal at the cathode or the coupling capacitor is
divided by an adjustable voltage divider and fed to the
feedback inputs (pins 18, 15 and 12). During horizontal
blanking time this signal is compared with an internal DC
voltage of approximately 5.8 V. Any difference will lead to
a reference black level correction by charging or
discharging the integrated capacitor which stores the
reference black level information between the horizontal
blanking pulses.
November 1992
5

5 Page





TDA4881 arduino
Philips Semiconductors
Advanced monitor video controller
PACKAGE OUTLINE
DIP20: plastic dual in-line package; 20 leads (300 mil)
Preliminary specification
TDA4881
SOT146-1
D
L
Z
20
pin 1 index
e
b
1
A2 A
A1
wM
b1
11
ME
c
(e 1)
MH
E
10
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
mm
4.2
0.51
3.2
1.73 0.53 0.36 26.92 6.40
1.30 0.38 0.23 26.54 6.22
inches
0.17
0.020
0.13
0.068 0.021 0.014 1.060
0.051 0.015 0.009 1.045
0.25
0.24
e
2.54
0.10
e1
7.62
0.30
L
3.60
3.05
0.14
0.12
ME
8.25
7.80
0.32
0.31
MH
w
Z (1)
max.
10.0
8.3
0.254
2.0
0.39
0.33
0.01 0.078
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT146-1
IEC
REFERENCES
JEDEC
EIAJ
SC603
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-05-24
November 1992
11

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