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Número de pieza TDA1301T
Descripción Digital servo processor DSIC2
Fabricantes NXP Semiconductors 
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Philips Semiconductors
Digital servo processor (DSIC2)
Product specification
TDA1301T
FEATURES
The DSIC2 realizes the following servo functions:
Diode signal preprocessing
Focus servo loop
Radial servo loop
Sledge motor servo loop
Three-line serial interface via the microcontroller
The other features include:
Full digital signal processing
Low power consumption, down to 30 mW
Low voltage supply 3 to 5.5 V
Integrated analog-to-digital converters and digital servo
loop filters
Double speed possible
Easy application
– Single supply voltage
– Small number of external components; only
6 decoupling capacitors
– Flexible system oscillator circuitry
– Usable for single/double Foucault and astigmatic
focus
– Full automatic radial error signal initialization offset
control and level initialization for track position
indicator
– No external adjustments required; no component
ageing
– Wide range of adjustable servo characteristics
– Simple 3-line serial command interface
– 28-pin SO package
– Great flexibility towards different CD mechanisms
– Full and transparent application information
High robustness/shock insensitivity
– Sophisticated track-loss (TL) detection mechanism
– Fast focus restart procedure
– Extended radial error signal
– Adjustable radial shock detector
– Defect drop-out detector
Fully automatic jump procedure for radial servo
Automatic focus start-up procedure and built-in FOK
(Focus OK)
Fast radial jump or access procedure
Self-operational servo-control without continuous
communication via the microcontroller
Direct communication to photodiode optics; no external
preprocessing.
GENERAL DESCRIPTION
The TDA1301T is a fully digital servo processor which has
been designed to provide all servo functions, except the
spindle motor control, in two-stage three-spot compact
disc systems. The device offers a high degree of
integration, combined with the low additional cost of
external components. The servo characteristics have a
wide range of adjustment via a three-line serial interface.
This offers an enormous flexibility with respect to
applications for different CD mechanisms. The circuit is
optimized for low-power low-voltage applications.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
VDDD
VDDA
IDDD
IDDA
IDDD(q)
Ii(cd)
Ii(sd)
Ptot
Tamb
digital supply voltage
analog supply voltage
digital supply current
analog supply current
digital quiescent supply current
central diode input currents (D1 to D4)
satellite diode input currents (R1 and R2)
total power dissipation
operating ambient temperature
note 1
note 1
Note
1. fsys = 4.2336 MHz; VRL = 0 V; VRH = 2.5 V (externally applied).
MIN.
3.0
3.0
40
TYP.
5
5
50
MAX.
5.5
5.5
10
15.8
7.9
+85
UNIT
V
V
mA
mA
µA
µA
µA
mW
°C
March 1994
2

1 page




TDA1301T pdf
Philips Semiconductors
Digital servo processor (DSIC2)
Product specification
TDA1301T
In the event of single Foucault focusing method, the DSIC2
signal conditioning can be switched under software control
so that the signal processing conforms to that given in
equation (4).
FEn = 2 × D-D----11-----+–-----DD-----22--
(4)
The FEn thus obtained is further processed by a
proportional integral and differential filter section (PID).
A focus OK flag (FOK) is generated by means of the
central aperture signal and an adjustable reference level.
This signal is used to provide extra protection for the
Track-Loss (TL) generation, the focus start-up procedure
and the drop-out detection. The radial or tracking error
signal is generated by the satellite detector signals R1 and
R2. The radial error signal (RE) can be formulated as per
equation (5).
REs = (R1 R2) × RE_gain
+ (R1 + R2) × RE_offset
(5)
Where the index ‘s’ indicates the automatic scaling
operation which is performed on the radial error signal.
This scaling is necessary to avoid non-optimum dynamic
range usage in the digital representation and, also, to
reduce radial bandwidth spread. The radial error signal will
also be released from offset during disc start-up. The four
signals from the central aperture detectors, together with
the satellite detector signals, generate a track position
signal (TPI) which can be formulated as per equation (6).
TPI = sin [ (D1 + D2 + D3 + D4)
(R1 + R2) × Sum_gain]
(6)
Where the weighting factor Sum_gain is generated
internally in the DSIC2 during initialization.
Focus control
The following focus servo functions are incorporated in the
DSIC2 digital controller.
FOCUS START-UP
Five initially loaded coefficients influence the start-up
behaviour of the focus controller. The automatically
generated triangular voltage can be influenced by
3 parameters, for the height (ramp_heigth) and DC-offset
(ramp_offset) of the triangle and its steepness (ramp_inc).
To protect against false focus point detections two
parameters are available. One is an absolute level on the
CA signal (CA_start) and the other is an absolute level on
the FEn signal (FE_start). When the CA_start level is
reached, the FOK signal becomes true. If the FOK signal
is true when the level on the FEn signal is reached the
focus PID is enabled and switches on when the next zero
crossing is detected in the FEn signal.
FOCUS POSITION CONTROL LOOP
The focus control loop contains a digital PID controller
which has 5 parameters available to the user. These
coefficients influence the integrating (foc_int), proportional
(foc_prop) and differentiating (foc_pole_lead) action of this
PID and the digital low-pass filter (foc_pole_noise) which
follows the PID. The fifth coefficient (foc_gain) influences
the loop gain.
DROP-OUT DETECTION
This detector can be influenced by one parameter
(CA_drop). The FOK signal will become false and the
integrator of the PID will hold if the CA signal drops below
the programmed absolute CA level. When the FOK signal
becomes false it is assumed, initially, to be caused by a
black dot.
FOCUS LOSS DETECTION AND FAST RESTART
Whenever FOK is false for longer than approximately
3 ms, it is assumed that the focus point is lost. A fast
restart procedure is initiated which is capable of restarting
the focus loop within 200 to 300 ms depending on the
programmed coefficients set by the microcontroller.
FOCUS LOOP GAIN SWITCHING
The gain of the focus control loop (foc_gain) can be
multiplied by a factor of 2 or divided by a factor of 2 during
normal operation. The integrator value of the PID is
corrected accordingly. The differentiating (foc_pole_lead)
action of the PID can be switched at the same time as the
gain switching is performed.
Radial control
The following radial servo functions are incorporated in
the DSIC2 digital controller.
LEVEL INITIALIZATION
During start-up an automatic adjustment procedure is
activated to set the values of the radial error gain
(RE_gain), offset (RE_offset) and satellite sum signal gain
(Sum_gain) for TPI level generation. The initialization
procedure runs in a radial open-loop situation and is
300 ms. This start-up time period may coincide with the
last part of the turn table motor start-up time period.
March 1994
6

5 Page





TDA1301T arduino
Philips Semiconductors
Digital servo processor (DSIC2)
Product specification
TDA1301T
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Slave clock mode: XTALI
VIL LOW level input voltage
VIH HIGH level input voltage
tH HIGH level input time
relative to the clock
period
2.0
45
0.5 V
V
55 %
Notes
1. fsys = 4.2336 MHz; VRL = 0 V; VRH = 2.5 V (externally applied).
2. Internal reference source with 4 different output voltages. Selection is achieved via the serial interface. The given
values are for an unloaded reference voltage.
3. fripple = 1 kHz; Vripple = 0.5 V (p-p).
4. Internal reference is switched OFF by serial interface. VRH is the reference input.
5. Externally applied VRH = 2.5 V and VRL = 0 V, measuring bandwidth: 200 Hz to 20 kHz, fi(ADC) = 1 kHz.
6. The gain of the ADC is defined as: GADC = fsys/Imax (counts/mA). Thus the digital output is II × GADC where: digital
output is the number of pulses at the digital output in counts per second and II is the DC input current in mA.
The maximum input current depends on the system frequency (fsys) and on Vref = VRH VRL
For D1 to D4: Ii(max) = 1.5 × fsys × Vref × 106/Ri × fsys [µA].
For R1 and R2: Ii(max) = 0.75 × fsys × Vref × 106/Ri × fsys [µA].
The gain tolerance is the deviation from the calculated gain regarding note 1.
7. At 10 to 90% levels with CL = 50 pF.
8. A resistor must be connected to set the gain of the oscillator circuit. The value of the resistor depends on the crystal
or resonator connected to the oscillator circuit (see also Chapter “Application information” ).
9. When the TDA1301T is supplied by an external oscillator frequency, no crystal or resonator is required while the
external reference resistor has different limits.
March 1994
12

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