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PDF TC850CPL Data sheet ( Hoja de datos )
| Número de pieza | TC850CPL | |
| Descripción | 15-Bit/ Fast Integrating CMOS A/D Converter | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TC850CPL (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
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TC850
15-Bit, Fast Integrating CMOS A/D Converter
Features
• 15-bit Resolution Plus Sign Bit
• Up to 40 Conversions per Second
• Integrating ADC Technique
- Monotonic
- High Noise Immunity
- Auto Zeroed Amplifiers Eliminate Offset
Trimming
• Wide Dynamic Range: 96dB
• Low Input Bias Current: 30pA
• Low Input Noise: 30µVP-P
• Sensitivity: 100µV
• Flexible Operational Control
• Continuous or On Demand Conversions
• Data Valid Output
• Bus Compatible, 3-State Data Outputs
- 8-Bit Data Bus
- Simple µP Interface
- Two Chip Enables
- Read ADC Result Like Memory
• ± 5V Power Supply Operation: 20mΩ
• 40-Pin Dual-in-Line or 44-Pin PLCC Packages
Applications
• Precision Analog Signal Processor
• Precision Sensor Interface
• High Accuracy DC Measurements
Device Selection Table
Part Number
TC850CPL
TC850IJL
TC850CLW
TC850ILW
Package
40-Pin PDIP
40-Pin CERDIP
44-Pin PLCC
44-Pin PLCC
Temperature
Range
0°C to +70°C
-25°C to +85°C
0°C to +70°C
-25°C to +85°C
Package Types
40-Pin PDIP/CERDIP
CS 1
CE 2
WR 3
RD 4
CONT/DEMAND 5
OVR/POL 6
L/H 7
DB7 8
DB6 9
DB5 10
DB4 11
DB3 12
DB2 13
DB1 14
DB0 15
BUSY 16
OSC1 17
OSC2 18
TEST 19
DGND 20
TC850CPL
TC850IJL
40 VDD
39 REF1+
38 CREF1+
37 CREF1-
36 REF-
35 CREF2-
34 CREF2+
33 REF2+
32 IN+
31 IN-
30
ANALOG
COMMON
29 CINTB
28 CINTA
27 CBUFA
26 CBUFB
25 BUFFER
24 INTIN
23 INTOUT
22 VSS
21 COMP
44-Pin PLCC
6 5 4 3 2 1 44 43 42 41 40
OVR/POL 7
L/H 8
DB7 9
39 CREF2-
38 CREF2+
37 REF2+
DB6 10
36 IN+
DB5 11
NC 12
DB4 13
DB3 14
TC850CLW
TC850ILW
35 IN-
34 NC
33
ANALOG
COMMON
32 CINTB
DB2 15
DB1 16
DB0 17
31 CINTA
30 CBUFA
29 CBUFB
18 19 20 21 22 23 24 25 26 27 28
NC = No Internal Connection
© 2002 Microchip Technology Inc.
DS21479B-page 1
1 page  
FIGURE 1-1:
STANDARD TEST CIRCUIT CONFIGURATION
+5V -5V
**
**
40 20
22
VDD DGND VSS IN+ 32 100MΩ
16 BUSY
8 DB7
IN- 31 0.01µF Input
9 DB6
10 DB5
11 DB4
12 DB3
13 DB2
ANALOG COMMON 30
REF1+
REF2+
REF-
39
33
36
+1.6384V
+0.0256V
61.44
14
15
1
2
3
4
5
6
7
17
kHz
DB1 TC850
DB0
CS
CE
WR
RD
CONT/DEMAND
OVR/POL
L/H
OSC1
CREF1+
CREF1-
CREF2+
CREF2-
BUFFER
INTIN
INTOUT
TEST
38
37
34
35
25
24
23
19
1µF*
1µF*
120MkΩ
RINT
0.1µF
CINT
NC
18 OSC2
21 COMP
CINTA CINTB CBUFA CBUFB
28 29 27 26
0.1 0.1 0.1 0.1 0.1
µF µF µF µF µF
NOTES: Unless otherwise specified, all 0.1µF capacitors are film dielectric.
Ceramic capacitors are not recommended.
NC = No Connection
*Polypropylene capacitors.
** 100pF Mica capacitors.
TC850
© 2002 Microchip Technology Inc.
DS21479B-page 5
5 Page 
5.0 PIN DESCRIPTION (ANALOG)
5.1 Differential Inputs (IN+ and IN–)
The analog signal to be measured is applied at the IN+
and IN– inputs. The differential input voltage must be
within the Common mode range of the converter. The
input Common mode range extends from VDD - 1.5V to
VSS +1.5V. Within this Common mode voltage range,
an 80 dB CMRR is typical.
The integrator output also follows the Common mode
voltage. The integrator output must not be allowed to
saturate. A worst-case condition exists, for example,
when a large, positive Common mode voltage, with a
near full scale negative differential input voltage, is
applied. The negative input signal drives the integrator
positive when most of its available swing has been
used up by the positive Common mode voltage. For
applications where maximum Common mode range is
critical, integrator swing can be reduced. The integrator
output can swing within 0.4V of either supply without
loss of linearity.
5.2 Differential Reference (VREF)
The TC850 requires two reference voltage sources in
order to generate the "fast-slow" de-integrate phases.
The main voltage reference (VREF1) is applied between
the REF1+ and REF- pins. The secondary reference
(VREF2) is applied between the REF2+ and REF- pins.
The reference voltage inputs are fully differential and
the reference voltage can be generated anywhere
within the power supply voltage of the converter. How-
ever, to minimize rollover error, especially at high con-
version rates, keep the reference Common mode
voltage (i.e., REF-) near or at the analog common
potential. All voltage reference inputs are high imped-
ance. Average reference input current is typically only
30pA.
5.3 Analog Common (ANALOG
COMMON)
Analog common is used as the IN- return during the
zero integrator and de-integrate phases of each con-
version. If IN- is at a different potential than analog
common, a Common mode voltage exists in the sys-
tem. This signal is rejected by the 80dB CMRR of the
converter. However, in most applications, IN- will be set
at a fixed, known voltage (power supply common, for
instance). In this case, analog common should be tied
to the same point so that the Common mode voltage is
eliminated.
© 2002 Microchip Technology Inc.
TC850
DS21479B-page 11
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet TC850CPL.PDF ] | |
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