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PDF TC74VHC541FW Data sheet ( Hoja de datos )

Número de pieza TC74VHC541FW
Descripción OCTAL BUS BUFFER
Fabricantes Toshiba 
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No Preview Available ! TC74VHC541FW Hoja de datos, Descripción, Manual

TC74VHC540,541F/FW/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC540F,TC74VHC540FW,TC74VHC540FT,TC74VHC540FK
TC74VHC541F,TC74VHC541FW,TC74VHC541FT,TC74VHC541FK
Octal Bus Buffer
TC74VHC540F/FW/FT/FK
Inverted, 3-State Outputs
TC74VHC541F/FW/FT/FK
Non-Inverted, 3-State Outputs
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74VHC540F, TC74VHC541F
The TC74VHC540/TC74VHC541 are advanced high speed
CMOS OCTAL BUS BUFFERs fabricated with silicon gate
C2MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The TC74VHC540 is an inverting type, and the TC74VHC541
is a non-inverting type.
When either G1 or G2 are high, the terminal outputs are in
the high-impedance state.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
High speed: tpd = 3.7 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power down protection is provided on all inputs.
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
Low noise: VOLP = 1.2 V (max)
Pin and function compatible with 74ALS540/541
TC74VHC540FW, TC74VHC541FW
TC74VHC540FT, TC74VHC541FT
TC74VHC540FK, TC74VHC541FK
Weight
SOP20-P-300-1.27A
: 0.22 g (typ.)
SOP20-P-300-1.27
: 0.22 g (typ.)
SOL20-P-300-1.27
: 0.46 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
VSSOP20-P-0030-0.50 : 0.03 g (typ.)
1 2006-06-01

1 page




TC74VHC541FW pdf
TC74VHC540,541F/FW/FT/FK
AC Characteristics (input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
(TC74VHC540)
Propagation delay
time
(TC74VHC541)
3-state output enable
time
3-state output disable
time
Output to output skew
Input capacitance
Output capacitance
Power dissipation
capacitance (Note 2)
Symbol
tpLH
tpHL
tpLH
tpHL
tpZL
tpZH
tpLZ
tpHZ
tosHL
tosLH
CIN
COUT
CPD
Test Condition
VCC (V)
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
RL = 1 k
3.3 ± 0.3
5.0 ± 0.5
RL = 1 k
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
(Note 1)
5.0 ± 0.5
TC74VHC540
TC74VHC541
CL (pF)
15
50
15
50
15
50
15
50
15
50
15
50
50
50
50
50
Ta = 25°C
Min Typ. Max
4.8 7.0
7.3 10.5
3.7 5.0
5.2 7.0
5.0 7.0
7.5 10.5
3.5 5.0
5.0 7.0
6.8 10.5
9.3 14.0
4.7 7.2
6.2 9.2
11.2 15.4
6.0 8.8
― ― 1.5
― ― 1.0
4 10
6
17
18
Ta =
40 to 85°C
Min Max
1.0 8.5
1.0 12.0
1.0 6.0
1.0 8.0
1.0 8.5
1.0 12.0
1.0 6.0
1.0 8.0
1.0 12.5
1.0 16.0
1.0 8.5
1.0 10.5
1.0 17.5
1.0 10.0
1.5
1.0
10
――
――
――
Unit
ns
ns
ns
ns
ns
pF
pF
pF
Note 1: Parameter guaranteed by design.
tosLH = |tpLHm tpLHn|, tosHL = |tpHLm tpHLn|
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/8 (per bit)
Noise Characteristics (input: tr = tf = 3 ns) (Note)
Characteristics
Symbol
Test Condition
Quiet output maximum dynamic
VOL
Quiet output minimum dynamic
VOL
Minimum high level dynamic input
voltage
Maximum low level dynamic input
voltage
VOLP
CL = 50 pF
VOLV
VIHD
VILD
CL = 50 pF
CL = 50 pF
CL = 50 pF
VCC (V)
5.0
5.0
Ta = 25°C
Typ. Limit
0.7 1.0
(0.9) (1.2)
0.7 1.0
(0.9) (1.2)
Unit
V
V
5.0 3.5 V
5.0 1.5 V
Note: The value in ( ) only applies to JEDEC SOP (FW) devices.
5 2006-06-01

5 Page





TC74VHC541FW arduino
Package Dimensions
TC74VHC540,541F/FW/FT/FK
Weight: 0.03 g (typ.)
11 2006-06-01

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