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Número de pieza | 74LV109 | |
Descripción | Dual JK flip-flop with set and reset; positive-edge trigger | |
Fabricantes | Philips | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 74LV109 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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74LV109
Dual JK flip-flop with set and reset;
positive-edge trigger
Product specification
Supersedes data of 1997 Jun 06
IC24 Data Handbook
1998 Apr 20
Philips
Semiconductors
1 page Philips Semiconductors
Dual JK flip-flop with set and reset; positive-edge trigger
Product specification
74LV109
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
SYMBOL PARAMETER
TEST CONDITIONS
-40°C to +85°C
MIN TYP1 MAX
VCC = 1.2 V
VIH
HIGH level Input
voltage
VCC = 2.0 V
VCC = 2.7 to 3.6 V
VCC = 1.2 V
VIL
LOW level Input
voltage
VCC = 2.0 V
VCC = 2.7 to 3.6 V
VCC = 1.2 V; VI = VIH or VIL; –IO = 100µA
VOH
HIGH level output VCC = 2.0 V; VI = VIH or VIL; –IO = 100µA
voltage; all outputs VCC = 2.7 V; VI = VIH or VIL; –IO = 100µA
VCC = 3.0 V; VI = VIH or VIL; –IO = 100µA
HIGH level output
VOH
voltage;
STANDARD
VCC = 3.0 V; VI = VIH or VIL; –IO = 6mA
outputs
0.9
1.4
2.0
1.8
2.5
2.8
2.40
1.2
2.0
2.7
3.0
2.82
0.3
0.6
0.8
VCC = 1.2 V; VI = VIH or VIL; IO = 100µA
VOL
LOW level output VCC = 2.0 V; VI = VIH or VIL; IO = 100µA
voltage; all outputs VCC = 2.7 V; VI = VIH or VIL; IO = 100µA
VCC = 3.0 V; VI = VIH or VIL; IO = 100µA
LOW level output
VOL
voltage;
STANDARD
VCC = 3.0 V; VI = VIH or VIL; IO = 6mA
outputs
0
0 0.2
0 0.2
0 0.2
0.25 0.40
II
Input leakage
current
VCC = 3.6 V; VI = VCC or GND
1.0
ICC
Quiescent supply
current; flip-flops
VCC = 3.6V; VI = VCC or GND; IO = 0
20.0
∆ICC
Additional
quiescent supply
current per input
VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V
500
NOTE:
1. All typical values are measured at Tamb = 25°C.
-40°C to +125°C
MIN MAX
0.9
1.4
2.0
0.3
0.6
0.8
1.8
2.5
2.8
2.20
0.2
0.2
0.2
0.50
1.0
80
850
UNIT
V
V
V
V
V
V
µA
µA
µA
AC CHARACTERISTICS
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL
PARAMETER
WAVEFORM
tPHL/tPLH
Propagation delay
nCP to nQ, nQ
Figure 1
tPLH
Propagation delay
nSD to nQ
Figure 2
CONDITION
VCC(V)
1.2
2.0
2.7
3.0 to 3.6
1.2
2.0
2.7
3.0 to 3.6
LIMITS
–40 to +85 °C
MIN TYP1 MAX
90
31 58
23 43
182 34
55
19 36
14 26
102 21
–40 to +125 °C
MIN MAX
70
51
41
44
33
26
UNIT
ns
ns
1998 Apr 20
5
5 Page Philips Semiconductors
Dual JK flip-flop with set and reset; positive-edge trigger
Product specification
74LV109
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
1998 Apr 20
11
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet 74LV109.PDF ] |
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