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PDF 74LCX162244 Data sheet ( Hoja de datos )

Número de pieza 74LCX162244
Descripción Low Voltage 16-Bit Buffer/Line Driver with 26 Series Resistors in Outputs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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September 2000
Revised August 2001
74LCX162244
Low Voltage 16-Bit Buffer/Line Driver
with 26Series Resistors in Outputs
General Description
The LCX162244 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCX162244 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
In addition, the outputs include equivalent 26(nominal)
series resistors to reduce overshoot and undershoot and
are designed to sink/source up to 12 mA at VCC = 3.0V.
The LCX162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s Outputs include equivalent series resistance of 26to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s 5.3 ns tPD max (VCC = 3.0V), 20 µA ICC max
s Power down high impedance inputs and outputs
s ±12 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number Package Number
Package Description
74LCX162244GX
(Note 1)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
74LCX162244MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCX162244MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: BGA package available in Tape and Reel only.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
Logic Symbol
© 2001 Fairchild Semiconductor Corporation DS500471
www.fairchildsemi.com

1 page




74LCX162244 pdf
DC Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
IOFF
ICC
ICC
Power-Off Leakage Current
Quiescent Supply Current
Increase in ICC per Input
VIN or VO = 5.5V
VI = VCC or GND
VIH = VCC 0.6V
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
VCC
(V)
0
2.3 3.6
2.3 3.6
TA = −40°C to +85°C
Min Max
10
20
500
Units
µA
µA
µA
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500
Symbol
Parameter
VCC = 3.3V ± 0.3V
CL = 50 pF
VCC = 2.7V
CL = 50 pF
VCC = 2.5V ± 0.2V
CL = 30 pF
Units
Min Max Min Max Min Max
tPHL Propagation Delay
tPLH Data to Output
1.0 5.3 1.0 6.0 1.0 6.4
ns
1.0 5.3 1.0 6.0 1.0 6.4
tPZL
tPZH
Output Enable Time
1.0 6.3 1.0 7.1 1.0 8.2
ns
1.0 6.3 1.0 7.1 1.0 8.2
tPLZ
tPHZ
Output Disable Time
1.0 5.4 1.0 5.7 1.0 6.5
ns
1.0 5.4 1.0 5.7 1.0 6.5
tOSHL
tOSLH
Output to Output Skew (Note 8)
1.0
1.0
ns
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
Capacitance
Conditions
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
VCC TA = 25°C
Units
(V) Typical
3.3 0.35
V
2.5 0.25
3.3 0.35
2.5 0.25
V
Symbol
CIN
COUT
CPD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Conditions
VCC = Open, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
Typical
7
8
20
Units
pF
pF
pF
5 www.fairchildsemi.com

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