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PDF 74LCX157MTC Data sheet ( Hoja de datos )
| Número de pieza | 74LCX157MTC | |
| Descripción | Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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May 1995
Revised March 1999
74LCX157
Low Voltage Quad 2-Input Multiplexer with 5V Tolerant
Inputs
General Description
The LCX157 is a high-speed quad 2-input multiplexer. Four
bits of data from two sources can be selected using the
common Select and Enable inputs. The four outputs
present the selected data in the true (noninverted) form.
The LCX157 can also be used as a function generator.
The 74LCX157 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs
s 2.3V–3.6V VCC specifications provided
s 5.8 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number Package Number
Package Description
74LCX157M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74LCX157SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX157MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
I0a–I0d
I1a–I1d
E
S
Za–Zd
Description
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
© 1999 Fairchild Semiconductor Corporation DS012465.prf
www.fairchildsemi.com
1 page  
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
Switch
Open
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output Low Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output High Enable and
Disable Times for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
Symbol
Vmi
Vmo
Vx
Vy
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
VCC
2.7V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
2.5V ± 0.2V
VCC/2
VCC/2
VOL + 0.15V
VOH − 0.15V
5 www.fairchildsemi.com
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74LCX157MTC.PDF ] | |
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