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PDF 74LCX10SJ Data sheet ( Hoja de datos )
| Número de pieza | 74LCX10SJ | |
| Descripción | Low Voltage Triple 3-Input NAND Gate with 5V Tolerant Inputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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February 2001
Revised February 2001
74LCX10
Low Voltage Triple 3-Input NAND Gate
with 5V Tolerant Inputs
General Description
The LCX10 contains three 3-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX10 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs
s 2.3V–3.6V VCC specifications provided
s 4.9 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number Package Number
Package Description
74LCX10M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74LCX10SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX10MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn, Cn
On
Description
Inputs
Outputs
© 2001 Fairchild Semiconductor Corporation DS500453
Truth Table
On = An Bn Cn
An Bn Cn
XXL
XLX
LXX
HHH
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
On
H
H
H
L
www.fairchildsemi.com
1 page  
Schematic Diagram Generic for LCX Family
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74LCX10SJ.PDF ] | |
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| Número de pieza | Descripción | Fabricantes |
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