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PDF IDT74ALVCH32244BF Data sheet ( Hoja de datos )
| Número de pieza | IDT74ALVCH32244BF | |
| Descripción | 3.3V CMOS 32-BIT BUFFER/ DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD | |
| Fabricantes | Integrated Device Tech | |
| Logotipo |  |
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IDT74ALVCH32244
3.3V CMOS 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIALTEMPERATURERANGE
3.3V CMOS 32-BIT
BUFFER/ DRIVER WITH
3-STATE OUTPUTS AND
BUS-HOLD
IDT74ALVCH32244
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in 96-ball LFBGA package
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for Heavy Loads
DESCRIPTION:
This 32-bit buffer/driver is built using advanced dual metal CMOS
technology. This high-speed, low power device offers bus/backplane
interface capability with improved packing density. The device has a flow-
through organization for simplifying board layout. The three-state controls
operate this device in a Quad-Nibble, Dual-Byte or single 16-bit word mode.
All inputs are designed with hysteresis for improved noise margin.
The ALVCH32244 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH32244 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
A3
1OE
1A1 A5
1A2 A6
1A3 B5
1A4 B6
A4
2OE
C5
2A1
C6
2A2
D5
2A3
2A4 D6
A2 1Y1
A1 1Y2
B2 1Y3
B1 1Y4
H4
3OE
E5
3A1
E6
3A2
F5
3A3
3A4 F6
C2 2Y1
C1 2Y2
D2 2Y3
D1 2Y4
4OE H3
4A1 G5
G6
4A2
H6
4A3
4A4 H5
E2 3Y1
E1 3Y2
F2 3Y3
F1 3Y4
J3
5OE
5A1 J5
5A2 J6
5A3 K5
5A4 K6
G2 4Y1
G1 4Y2
H1 4Y3
H2 4Y4
6OE J4
L5
6A1
L6
6A2
M5
6A3
6A4 M6
J2 5Y1
J1 5Y2
K2 5Y3
K1 5Y4
T4
7OE
N5
7A1
N6
7A2
P5
7A3
7A4 P6
L2 6Y1
L1 6Y2
M2 6Y3
M1 6Y4
T3
8OE
R5
8A1
R6
8A2
T6
8A3
8A4 T5
N2 7Y1
N1 7Y2
P2 7Y3
P1 7Y4
R2 8Y1
R1 8Y2
T1 8Y3
T2 8Y4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
©2000 Integrated Device Technology, Inc.
1
FEBRUARY 2000
DSC-4906/1
1 page  
IDT74ALVCH32244
3.3V CMOS 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
INDUSTRIALTEMPERATURERANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
VOH Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC = 2.3V
IOH = – 6mA
VCC = 2.3V
IOH = – 12mA
VCC = 2.7V
VCC = 3V
VCC = 3V
IOH = – 24mA
VOL OutputLOWVoltage
VCC = 2.3V to 3.6V
IOL = 0.1mA
VCC = 2.3V
IOL = 6mA
IOL = 12mA
VCC = 2.7V
IOL = 12mA
VCC = 3V
IOL = 24mA
Min. Max. Unit
VCC – 0.2
—
V
2—
1.7 —
2.2 —
2.4 —
2—
— 0.2 V
— 0.4
— 0.7
— 0.4
— 0.55
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25°C
Symbol
CPD
CPD
Parameter
Power Dissipation Capacitance per Driver Outputs enabled
Power Dissipation Capacitance per Driver Outputs disabled
Test Conditions
CL = 0pF, f = 10Mhz
VCC = 2.5V ± 0.2V
Typical
32
8
VCC = 3.3V ± 0.3V
Typical
38
10
Unit
pF
SWITCHING CHARACTERISTICS(1)
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSK(O)
Parameter
Propagation Delay
xAx to xYx
Output Enable Time
xOE to xYx
Output Disable Time
xOE to xYx
Output Skew(2)
VCC = 2.5V ± 0.2V
Min. Max.
1 3.7
1 5.7
1 5.2
——
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2 Skew between any two outputs of the same package and switching in the same direction.
VCC = 2.7V
Min. Max.
— 3.6
VCC = 3.3V ± 0.3V
Min. Max.
13
Unit
ns
— 5.4
1 4.4 ns
— 4.6
1 4.1 ns
— — — 500 ps
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet IDT74ALVCH32244BF.PDF ] | |
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