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PDF ZXLD1601 Data sheet ( Hoja de datos )

Número de pieza ZXLD1601
Descripción ADJUSTABLE DC - DC BOOST CONVERTER WITH INTERNAL SWITCH IN SC70
Fabricantes Zetex Semiconductors 
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ZXLD1601
ADJUSTABLE DC - DC BOOST CONVERTER WITH INTERNAL SWITCH
IN SC70
DESCRIPTION
The ZXLD1601 is a PFM inductive boost converter
designed to provide output voltages of up to 28V from
a 2.5V to 5.5V input supply.
The ZXLD1601 includes the output switch and peak
current sense resistor, and can provide up to 10mA
output current at maximum output voltage. Higher
current is available at lower output voltages.
Quiescent current is typically 60A and a shutdown
function is provided to reduce this current to less than
100nA in the ‘off’ state.
ADVANCED FEATURES
Internal 30V NDMOS switch, current sense and
output setting resistors.
Output voltage is set to a nominal value between 26V
and 28V, by an internal resistor network, but can be
adjusted to lower values by external resistors, an
external PWM control signal applied to the ‘Enable’
pin, or a combination of the two. Depending upon the
control frequency, the PWM signal will provide either
continuous (low ripple) or gated control. The PWM
filter components are contained within the chip.
Minimum output voltage is determined by the input
supply.
The device is assembled in a low profile SC70-6 pin
package.
APPLICATIONS
LCD and OLED bias
True analogue output voltage control via PWM
with internal filter
FEATURES
Low profile SC70-6 pin package
Internal PWM filter for adjustable output
High efficiency (85% typ)
Wide input voltage range: 2.5V to 5.5V
Cellular / mobile phones
Digital cameras
PDAs
LCD modules
Varactor and PIN diode bias
Palmtop computers
Up to 250mA output current at 5V
Low quiescent current: (60A typ)
TYPICAL APPLICATION CIRCUIT
100nA maximum shutdown current
Up to 1MHz switching frequency
Low external component count
PINOUT
TOP VIEW
ISSUE 3 - AUGUST 2004
1
SEMICONDUCTORS

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ZXLD1601 pdf
ZXLD1601
Device Description
The device is a PFM flyback dc-dc boost converter,
working in discontinuous mode.
With reference to the chip block diagram and typical
application circuit, the operation of the device is as
follows:
Control loop
When ‘EN’ is high, the control circuits become active
and the low side of the coil (L1) is switched to ground
via NDMOS transistor (MN). The current in L1 is
allowed to build up to an internally defined level
(nominally 320mA) before MN is turned off. The energy
stored in L1 is then transferred to the output capacitor
(C2) via Schottky diode (D1). The output voltage is
sensed at pin ‘VSENSE’ by internal resistors R1 and R2
(which may be shunted externally at pin ‘FB’) and
compared to a reference voltage VREF (1.025V
nominal). A comparator senses when the output
voltage is above that set by the reference and its output
is used to control the ‘off’ time of the output switch. The
control loop is self-oscillating, producing pulses of up
to 5µs maximum duration (switch ‘on’), at a frequency
that varies in proportion to the output current. The
feedback loop maintains a voltage of VREF at the FB pin
and therefore defines a maximum output voltage equal
to VREF *(R1+R2)/R1. The minimum ‘off’ time of the
output switch is fixed at 0.5µs nominal, to allow time
for the coil’s energy to be dissipated before the switch
is turned on again. This maintains stable and efficient
operation in discontinuous mode.
Filtered PWM operation
The input of an internal low pass filter is switched to
VREF when the EN pin is high and switched to ground
when the EN pin is low. The output of this filter drives
the comparator within the control loop. A continuous
high state on EN therefore provides a filtered voltage of
value Vref to the comparator. However, by varying the
duty cycle of the EN signal at a suitably high frequency
(f>10kHz), the control loop will see a voltage, that has
an average value equal to the duty cycle multiplied by
VREF. This provides a means of adjusting the output
voltage to a lower value. It also allows the device to be
both turned on and adjusted with a single signal at the
‘EN’ pin. The output during this mode of operation will
be a dc voltage equal to VREF*(R1+R2)/R1 x duty cycle.
Gated PWM operation
The internal circuitry of the ZXLD1601 is turned off
when no signal is present on the ‘EN’ pin for more than
120µs (nominal). A low frequency signal applied to the
EN pin will therefore gate the device ‘on’ and ‘off’ at the
gating frequency and the duty cycle of this signal can
be varied to provide an average output equal to VREF
*(R1+R2)/R1 x duty cycle. For best accuracy, the gating
frequency should be made as low as possible (e.g.
below 1kHz), such that the turn off delay of the chip is
only a small proportion of the gating period
Further details of setting output current are given in the
application notes.
ISSUE 3 - AUGUST 2004
5
SEMICONDUCTORS

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ZXLD1601 arduino
NOTES:
ZXLD1601
ISSUE 3 - AUGUST 2004
11
SEMICONDUCTORS

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