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PDF ZVP4105A Data sheet ( Hoja de datos )
| Número de pieza | ZVP4105A | |
| Descripción | P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET | |
| Fabricantes | Zetex Semiconductors | |
| Logotipo |  |
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P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 MARCH 94
FEATURES
* 50 Volt VDS
* RDS(on)=10Ω
* Low threshold
ZVP4105A
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
D
G
S
E-Line
TO92 Compatible
VALUE
-50
-175
-520
± 20
625
-55 to +150
UNIT
V
mA
mA
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS -50
V ID=-0.25mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) -0.8 -2.0 V
ID=-1mA, VDS= VGS
Gate-Body Leakage
Zero Gate Voltage Drain
Current
IGSS
IDSS
Static Drain-Source On-State RDS(on)
Resistance (1)
10
-15
-60
-100
10
nA
µA
µA
nA
Ω
VGS=± 20V, VDS=0V
VDS=-50V, VGS=0V
VDS=-50V, VGS=0V, T=125°C(2)
VDS=-25V, VGS=0V
VGS=-5V,ID=-100mA
Forward Transconductance gfs
(1)(2)
50
mS VDS=-25V,ID=-100mA
Input Capacitance (2)(4)
Common Source Output
Capacitance (2)(4)
Ciss
Coss
40 pF
15 pF VDS=-25V, VGS=0V, f=1MHz
Reverse Transfer
Capacitance (2)(4)
Crss
6 pF
Turn-On Delay Time (2)(3)(4)
Rise Time (2)(3)(4)
Turn-Off Delay Time (2)(3)(4)
Fall Time (2)(3)(4)
td(on)
tr
td(off)
tf
10 ns
10 ns VDD≈-30V, ID=-270mA
18 ns
25 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2%
(2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
3-435
(
4
)
1 page | ||
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| PDF Descargar | [ Datasheet ZVP4105A.PDF ] | |
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