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PDF ZN429E8 Data sheet ( Hoja de datos )

Número de pieza ZN429E8
Descripción LOW COST 8-BIT D-A CONVERTER
Fabricantes ETC 
Logotipo ETC Logotipo



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ZN429E8 pdf
ZN429
Fig.5 Unipolar operation - component values
UNIPOLAR ADJUSTMENT PROCEDURE
(i) Set all bits to OFF (LOW) and adjust zero until VOUT =
0.0000V.
(ii) Set all bits ON (HIGH) and adjust gain until VOUT =
FS - 1LSB.
UNIPOLAR SETTING UP POINTS
Output Range, +FS
LSB
FS - 1LSB
+5V
19.5 mV
4.9805V
+10V
39.1mV
9.9609V
1LSB = FS
256
UNIPOLAR LOGIC CODING
Input Code
(Binary)
Analog Output
(Nominal Value)
(2) Bipolar D-A Converter
For bipolar operation the output from the ZN429 is offset
by half full-scale by connecting a resistor R3 between VREF
IN and the inverting input of the buffer amplifier (Fig.6).
When the digital input of the ZN429 is zero the analog
output is zero and the amplifier output should be -full-scale.
An input of all ones to the D-A will give a ZN429 output of d
VREF IN and the amplifier output required is +full-scale. Also,
to match the ladder resistance the parallel combination of
R1, R2 and R3 should be 10k.
The nominal values of R1, R2 and R3 which meet these
conditions are given by
R1 = 20Gk, R2 = 20G/(G-1)kand R3 = 20k.
where the resultant output range is ±G.VREF IN.
Assuming that VREF IN = 2.5V the nominal values of
resistors for ±5 and ±10V output ranges are given in the
following table:
11111111
11111110
11000000
10000001
10000000
01111111
01000000
00000001
00000000
FS - 1LSB
FS - 2 LSB
3/4 FS
1/2 FS + 1LSB
1/2 FS
1/2 FS - 1LSB
1/4 FS
1LSB
0
Output Range G
±5V 2
±10V
4
R1
40k
80k
R2
40k
26.67k
R3
20k
20k
Minus full scale (0FFSET) is set by adjusting R1 about
its nominal value relative to R3. Plus full-scale (GAIN) is set
by adjusting R2 relative to R1.
Settling time for a major transistion is 2.5µs typical.

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