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PDF PCK2010RADL Data sheet ( Hoja de datos )
| Número de pieza | PCK2010RADL | |
| Descripción | CK98R 100/133MHz RCC spread spectrum system clock generator | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
PCK2010RA
CK98R (100/133MHz) RCC spread
spectrum system clock generator
Product specification
Supersedes data of 2000 Dec 01
ICL03 — PC Motherboard ICs; Logic Products Group
2001 Apr 02
Philips
Semiconductors
1 page  
Philips Semiconductors
CK98R (100/133MHz) RCC spread spectrum
system clock generator
Product specification
PCK2010RA
FUNCTION TABLE
SEL
133/100
SEL1
SEL0
CPU
CPUDIV2
3V66
PCI 48 MHz
REF
IOAPIC
0 0 0 HI-Z HI-Z HI-Z HI-Z HI-Z
HI-Z
HI-Z
0 0 1 100 MHz 50 MHz 66 MHz 33 MHz 48 MHz 14.318 MHz 16.67 MHz
0 1 0 100 MHz 50 MHz 66 MHz 33 MHz HI-Z 14.318 MHz 16.67 MHz
0 1 1 100 MHz 50 MHz 66 MHz 33 MHz 48 MHz 14.318 MHz 16.67 MHz
1
0
0
TCLK/2
TCLK/4
TCLK/4
TCLK/8
TCLK/2
TCLK
TCLK/16
1 0 1 133 MHz 66 MHz 66 MHz 33 MHz 48 MHz 14.318 MHz 16.67 MHz
1 1 0 133 MHz 66 MHz 66 MHz 33 MHz HI-Z 14.318 MHz 16.67 MHz
1 1 1 133 MHz 66 MHz 66 MHz 33 MHz 48 MHz 14.318 MHz 16.67 MHz
NOTES:
1. Required for board level “bed-of-nails” testing.
2. Philips center spread mode.
3. 48 MHz PLL disabled to reduce component jitter. 48 MHz outputs to be held Hi-Z instead of driven to LOW state.
4. “Normal” mode of operation.
5. TCLK is a test clock over driven on the XTALIN input during test mode. TCLK mode is based on 133 MHz CPU select logic.
6. Required for DC output impedance verification.
7. Frequency accuracy of 48 MHz must be +167 PPM to match USB default.
8. Range of reference frequency allowed is MIN = 14.316 MHz, NOMINAL = 14.31818 MHz, MAX = 14.32 MHz.
NOTES
1
2
3
4, 7, 8
5, 6
2
3
4, 7, 8
CLOCK OUTPUT
USBCLK7
TARGET FREQUENCY (MHz)
48.0
ACTUAL FREQUENCY (MHz)
48.008
PPM
167
CLOCK ENABLE CONFIGURATION
CPUSTOP PWRDWN PCISTOP CPUCLK CPUDIV2 APIC 3V66 PCI PCI_F REF / 48 MHz OSC VCOs
X
0
X
LOW
LOW
LOW LOW LOW LOW
LOW
OFF OFF
0
1
0
LOW
ON ON LOW LOW ON
ON ON ON
0
1
1
LOW
ON
ON LOW ON
ON
ON ON ON
1
1
0
ON ON ON ON LOW ON
ON ON ON
1
1
1
ON
ON
ON ON ON
ON
ON ON ON
NOTES:
1. LOW means outputs held static LOW as per latency requirement below
2. ON means active.
3. PWRDWN pulled LOW, impacts all outputs including REF and 48 MHz outputs.
4. All 3V66 clocks as well as CPU clocks should stop cleanly when CPUSTOP is pulled LOW.
5. CPUDIV2, IOAPIC, REF, 48 MHz signals are not controlled by the CPUSTOP functionality and are enabled all in all conditions except when
PWRDWN is LOW.
POWER MANAGEMENT REQUIREMENTS
SIGNAL
SIGNAL STATE
LATENCY
NO. OF RISING EDGES OF FREE RUNNING PCICLK
CPUSTOP
0 (DISABLED)
1
1 (ENABLED)
1
PCISTOP
0 (DISABLED)
1
1 (ENABLED)
1
PWRDWN
1 (NORMAL OPERATION)
3 ms
0 (POWER DOWN)
2 MAX
NOTES:
1. Clock ON/OFF latency is defined as the number of rising edges of free running PCICLKs between the clock disable goes HIGH/LOW to the
first valid clock that comes out of the device.
2. Power up latency is when PWRDWN goes inactive (HIGH) to when the first valid clocks are driven from the device.
2001 Apr 02
5
5 Page 
Philips Semiconductors
CK98R (100/133MHz) RCC spread spectrum
system clock generator
SPREAD SPECTRUM FUNCTION TABLE
SPREAD#
SEL133/100# SEL1 SEL0
pin 34
pin 28
pin 33 pin 32
0 (active)
0 (100 MHz)
0
0
0 (active)
0 (100 MHz)
0
1
0 (active)
0 (100 MHz)
1
0
0 (active)
0 (100 MHz)
1
1
0 (active)
1 (133 MHz)
0
0
0 (active)
1 (133 MHz)
0
1
0 (active)
1 (133 MHz)
1
0
0 (active)
1 (133 MHz)
1
1
1 (inactive)
0 (100 MHz)
0
0
1 (inactive)
0 (100 MHz)
0
1
1 (inactive)
0 (100 MHz)
1
0
1 (inactive)
0 (100 MHz)
1
1
1 (inactive)
1 (133 MHz)
0
0
1 (inactive)
1 (133 MHz)
0
1
1 (inactive)
1 (133 MHz)
1
0
1 (inactive)
1 (133 MHz)
1
1
Function
3-State to High Impedance
100 MHz, Center Spread ±0.6%
100 MHz, Down Spread –0.6%
100 MHz, Down Spread –0.6%
Test Mode
133 MHz, Center Spread ±0.6%
133 MHz, Down Spread –0.6%
133 MHz, Down Spread –0.6%
3-State to High Impedance
100 MHz, No Spread Spectrum
100 MHz, No Spread Spectrum
100 MHz, No Spread Sprectrum
Test Mode
133 MHz, No Spread Sprectrum
133 MHz, No Spread Sprectrum
133 MHz, No Spread Sprectrum
Product specification
PCK2010RA
48 MHz PLL
Inactive
Active
Inactive
Active
Active
Active
Inactive
Active
Inactive
Active
Inactive
Active
Active
Active
Inactive
Active
2001 Apr 02
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet PCK2010RADL.PDF ] | |
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