DataSheet.es X1240 Hoja de datos PDF



PDF X1240 Datasheet ( Hoja de datos )

Número de pieza X1240
Descripción Real Time Clock/Calendar with EEPROM
Fabricantes Xicor 
Logotipo Xicor Logotipo
Vista previa
Total 19 Páginas
		
X1240 datasheet

1 Page

X1240 pdf
X1240
RWEL: Register Write Enable Latch—Volatile
This bit is a volatile latch that powers up in the LOW
(disabled) state. The RWEL bit must be set to “1” prior
to any writes to the Clock/Control Registers. Writes to
RWEL bit do not cause a nonvolatile write cycle, so the
device is ready for the next operation immediately after
the stop condition. A write to the CCR requires both the
RWEL and WEL bits to be set in a specific sequence.
WEL: Write Enable Latch—Volatile
The WEL bit controls the access to the CCR and mem-
ory array during a write operation. This bit is a volatile
latch that powers up in the LOW (disabled) state. While
the WEL bit is LOW, writes to the CCR or any array
address will be ignored (no acknowledge will be issued
after the Data Byte). The WEL bit is set by writing a “1”
to the WEL bit and zeroes to the other bits of the Status
Register. Once set, WEL remains set until either reset
to 0 (by writing a “0” to the WEL bit and zeroes to the
other bits of the Status Register) or until the part pow-
ers up again. Writes to WEL bit do not cause a non-vol-
atile write cycle, so the device is ready for the next
operation immediately after the stop condition.
RTCF: Real Time Clock Fail Bit—Volatile
This bit is set to a ‘1’ after a total power failure. This is a
read only bit that is set by hardware when the device
powers up after having lost all power to the device. The
bit is set regardless of whether VCC or VBACK is applied
first. The loss of one or the other supplies does not
result in setting the RTCF bit. The first valid write to the
RTC (writing one byte is sufficient) resets the RTCF bit
to ‘0’.
Unused Bits:
These devices do not use bits 3 through 6, but must
have a zero in these bit positions. The Data Byte output
during a SR read will contain zeros in these bit locations.
CONTROL REGISTERS
Block Protect Bits - BP2, BP1, BP0 - (Nonvolatile)
The Block Protect Bits, BP2, BP1 and BP0, determine
which blocks of the array are write protected. A write to
a protected block of memory is ignored. The block pro-
tect bits will prevent write operations to one of eight
segments of the array. The partitions are described in
Table 3.
Table 3. Block Protect Bits
Protected Addresses
Array Lock
X1240
000
None
None
001
600h - 7FFh
Upper 1/4
010
400h - 7FFh
Upper 1/2
011
000h - 7FFh
Full Array
100
000h - 03Fh
First Page
101
000h - 07Fh
First 2 pgs
110
000h - 0FFh
First 4 pgs
111
000h - 1FFh
First 8 Pgs
WRITING TO THE CLOCK/CONTROL REGISTERS
Changing any of the nonvolatile bits of the clock/control
register requires the following steps:
—Write a 02H to the Status Register to set the Write
Enable Latch (WEL). This is a volatile operation, so
there is no delay after the write. (Operation pre-
ceeded by a start and ended with a stop).
—Write a 06H to the Status Register to set both the
Register Write Enable Latch (RWEL) and the WEL
bit. This is also a volatile cycle. The zeros in the data
byte are required. (Operation preceeded by a start
and ended with a stop).
—Write one to 8 bytes to the Clock/Control Registers
with the desired clock, or control data. This sequence
starts with a start bit, requires a slave byte of
“11011110” and an address within the CCR and is
terminated by a stop bit. A write to the CCR changes
EEPROM values so these initiate a nonvolatile write
cycle and will take up to 10ms to complete. Writes to
undefined areas have no effect. The RWEL bit is
reset by the completion of a nonvolatile write write
cycle, so the sequence must be repeated to again ini-
tiate another change to the CCR contents. If the
sequence is not completed for any reason (by send-
ing an incorrect number of bits or sending a start
instead of a stop, for example) the RWEL bit is not
reset and the device remains in an active mode.
—Writing all zeros to the status register resets both the
WEL and RWEL bits.
—A read operation occurring between any of the previ-
ous operations will not interrupt the register write
operation.
—The RWEL and WEL bits can be reset by writing a 0
to the Status Register.
5

5 Page

X1240 arduino
X1240
Figure 10. Current Address Read Sequence
Signals from
the Master
SDA Bus
Signals from
the Slave
S
t
a Slave
r Address
t
1 1111
A
C
K
Data
S
t
o
p
Random Read
Random read operation allows the master to access
any memory location in the array. Prior to issuing the
Slave Address Byte with the R/W bit set to one, the
master must first perform a “dummy” write operation.
The master issues the start condition and the Slave
Address Byte, receives an acknowledge, then issues
the Word Address Bytes. After acknowledging receipts
of the Word Address Bytes, the master immediately
issues another start condition and the Slave Address
Byte with the R/W bit set to one. This is followed by an
acknowledge from the device and then by the eight bit
word. The master terminates the read operation by not
responding with an acknowledge and then issuing a
stop condition. Refer to Figure 11 for the address,
acknowledge, and data transfer sequence.
In a similar operation, called “Set Current Address,”
the device sets the address if a stop is issued instead of
the second start shown in Figure 11. The X1240 then
goes into standby mode after the stop and all bus activity
will be ignored until a start is detected. This operation
loads the new address into the address counter. The next
Current Address Read operation will read from the
Figure 11. Random Address Read Sequence
newly loaded address. This operation could be useful
if the master knows the next address it needs to read,
but is not ready for the data.
Sequential Read
Sequential reads can be initiated as either a current
address read or random address read. The first Data
Byte is transmitted as with the other modes; however,
the master now responds with an acknowledge, indicat-
ing it requires additional data. The device continues to
output data for each acknowledge received. The master
terminates the read operation by not responding with
an acknowledge and then issuing a stop condition.
The data output is sequential, with the data from address
n followed by the data from address n + 1. The address
counter for read operations increments through all page
and column addresses, allowing the entire memory
contents to be serially read during one operation. At
the end of the address space the counter “rolls over” to
the start of the address space and the device continues
to output data for each acknowledge received. Refer
to Figure 12 for the acknowledge and data transfer
sequence.
Signals from
the Master
SDA Bus
Signals from
the Slave
S
t
a
r
Slave
Address
t
Word
Address 1
Word
Address 0
S
t
a Slave
r Address
t
1 1 1 1 0 0 0 0 00
A
C
K
A
C
K
1
A
C
K
1111
A
C
K
Data
S
t
o
p
10

10 Page





PáginasTotal 19 Páginas
PDF Descargar[ X1240.PDF ]

Enlace url


Hoja de datos destacado

Número de piezaDescripciónFabricantes
X1240Real Time Clock/Calendar with EEPROMXicor
Xicor
X1240S8Real Time Clock/Calendar with EEPROMXicor
Xicor
X1240S8IReal Time Clock/Calendar with EEPROMXicor
Xicor
X1240V8Real Time Clock/Calendar with EEPROMXicor
Xicor
X1240V8IReal Time Clock/Calendar with EEPROMXicor
Xicor
X1243Real Time Clock/Calendar/Alarm with EEPROMXicor
Xicor
X1243S8Real Time Clock/Calendar/Alarm with EEPROMXicor
Xicor


Número de piezaDescripciónFabricantes
SSM2604

Low Power Audio Codec.

Analog Devices
Analog Devices
SLG3NB3331

32.768 kHz and MHz GreenCLK.

Silego
Silego
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices
SDC1741

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


Index : 0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z




www.DataSheet.es    |   2018   |  Contacto  |  Buscar