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PDF WS7107CPL Data sheet ( Hoja de datos )
| Número de pieza | WS7107CPL | |
| Descripción | 3 Digit LCD/LED Display A/D Converters | |
| Fabricantes | Wing Shing Computer Components | |
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3 1/2Digit LCD/LED Display A/D
Converters
WS7106 / WS7107
Features
• Guaranteed Zero Reading for 0V Input on All Scales
• True Polarity at Zero for Precise Null Detection
• True Differential Input and Reference, Direct Display
Drive- LCD WS7106, LED WS7107
• On Chip Clock and Reference
• Low Noise - Less Than 15µVP-P
• No Additional Active Circuits Required
• Low Power Dissipation - Typically Less Than 10mW
Ordering Information
Description
The WS7106 and WS7107 are high performance, low
power, 31/2 digit A/D converters. Included are seven seg-
ment decoders, display drivers, a reference, and a clock.
The WS7106 is designed to interface with a liquid crystal dis-
play (LCD) and includes a multiplexed backplane drive; the
WS 7107 will directly drive an instrument size light emitting
diode (LED) display.
The WS7106 and WS 7107 bring together a combination of
high accuracy, versatility, and true economy.True differential
inputs and reference are useful in all systems, but give the
desiger an uncommon advantage when measuring load
cells, strain gauges and other bridge type transducers.
Finally, the true economy of single power supply operation
(WS7106), enables a high performance panel meter to built
with the addition of only 10 passive compoents and a disply.
PART NO.
WS7106CPL
WS7107CPL
TEMP.
RANGE (oC)
0 to 70
0 to70
PACKAGE
40Ld PDIP
40Ld PDIP
PKG. NO.
E40.6
E40.6
Pinouts
WS7106CPL (PDIP)
WS7107CPL (PDIP)
V+
D1
C1
B1
(1’ s) A1
F1
G1
E1
D2
C2
B2
(10’ s)
A2
F2
E2
D3
B3
(100’ s)
F3
E3
(1000) AB4
(MINUS) POL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 OSC 1
39 OSC 2
38 OSC 3
37 TEST
36 REF HI
35 REF LO
34 CREF+
33 CREF-
32 COMMON
31 IN HI
30 IN LO
29 A-Z
28 BUFF
27 INT
26 V-
25 G2 (10’ s)
24 C3
23 A3 (100’ s)
22 G3
21 BP/GND
Wing Shing Computer Components Co., (H.K.)Ltd.
Homepage: http://www.wingshing.com
Tel:(852)2341 9276 Fax:(852)2797 8153
E-mail: [email protected]
1 page  
Detailed Description
Analog Section
Figure 3 shows the Analog Section for the WS7106 and
WS7107. Each measurement cycle is divided into three
phases. They are (1) auto-zero (A-Z), (2) signal integrate
(INT) and (3) de-integrate (DE).
Auto-Zer o Phase
During auto-zero three things happen. First, input high and
low are disconnected from the pins and internally shorted to
analog COMMON. Second, the reference capacitor is
charged to the reference voltage. Third, a feedback loop is
closed around the system to charge the auto-zero capacitor
CAZ to compensate for offset voltages in the buffer amplifier,
integrator, and comparator. Since the comparator is included
in the loop, the A-Z accuracy is limited only by the noise of
the system. In any case, the offset referred to the input is
less than 10µV.
Signal Integrate Phase
During signal integrate, the auto-zero loop is opened, the
internal short is removed, and the internal input high and low
are connected to the external pins. The converter then
integrates the differential voltage between IN HI and IN LO
for a fixed time. This differential voltage can be within a wide
common mode range: up to 1V from either supply. If, on the
other hand, the input signal has no return with respect to the
converter power supply, IN LO can be tied to analog
COMMON to establish the correct common mode voltage. At
WS7106 / WS7107
the end of this phase, the polarity of the integrated signal is
determined.
De-Integrate Phase
The final phase is de-integrate, or reference integrate. Input
low is internally connected to analog COMMON and input
high is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the capacitor
will be connected with the correct polarity to cause the
integrator output to return to zero. The time required for the
output to return to zero is proportional to the input signal.
Specifically the digital reading displayed is:
DISPLAY
COUNT
=
1000
V---V--R---I-EN----F-
.
Differential Input
The input can accept differential voltages anywhere within the
common mode range of the input amplifier, or specifically from
0.5V below the positive supply to 1V above the negative sup-
ply. In this range, the system has a CMRR of 86dB typical.
However, care must be exercised to assure the integrator out-
put does not saturate. A worst case condition would be a large
positive common mode voltage with a near full scale negative
differential input voltage. The negative input signal drives the
integrator positive when most of its swing has been used up
by the positive common mode voltage. For these critical appli-
cations the integrator output swing can be reduced to less
than the recommended 2V full scale swing with little loss of
accuracy. The integrator output can swing to within 0.3V of
either supply without loss of linearity.
STRAY
CREF
STRAY
CREF+ REF HI
34 36
V+
REF LO CREF -
35 33
RINT
BUFFER V+
28 1
31
IN HI
10µA
INT
A-Z
32
COMMON
A-Z
DE-
DE+
A-Z
DE+
DE-
-
+
INPUT
HIGH
2.8V
N
-
+
30
IN LO
INT
A-Z AND DE(±)
CAZ
A-Z
29
CINT
INT
27
INTEGRATOR
+-
-
+
6.2V
A-Z
COMPARATOR
INPUT
LOW
V-
FIGURE 3. ANALOG SECTION OF WS7106 AND WS7107
TO
DIGITAL
SECTION
5
5 Page 
Typical Applications (Continued)
OSC 1 40
OSC 2 39
TO PIN 1
100kΩ
OSC 3 38
TEST 37
100pF
SET VREF
= 100mV
REF HI 36
REF LO 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
0.1µF
1kΩ 10kΩ 10kΩ
V+
1.2V (ICL8069)
1MΩ
+
0.47µF
47kΩ
0.01µF
IN
-
INT 27
V - 26
0.22µF
V-
G2 25
C3 24
A3 23
TO DISPLAY
G3 22
GND 21
WS7106 / WS7107
OSC 1 40
OSC 2 39
OSC 3 38
TEST 37
REF HI 36
REF LO 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V - 26
G2 25
C3 24
A3 23
G3 22
GND 21
TO PIN 1
100kΩ
100pF
SET VREF
= 100mV
0.1µF
1kΩ 100kΩ
0.47µF
47kΩ
1MΩ
0.01µF
+5V
6.8V
+
IN
-
0.22µF
-5V
TO DISPLAY
IN LO is tied to supply COMMON establishing the correct common mode
voltage. If COMMON is not shorted to GND, the input voltage may float
with respect to the power supply and COMMON acts as a pre-regulator
for the reference. If COMMON is shorted to GND, the input is single
ended (referred to supply GND) and the pre-regulator is overridden.
FIGURE 13. WS 7107 WITH AN EXTERNAL BAND-GAP
REFERENCE (1.2V TYPE)
Since low TC zeners have breakdown voltages ~ 6.8V, diode must
be placed across the total supply (10V). As in the case of Figure 14,
IN LO may be tied to either COMMON or GND.
FIGURE 14. WS7107 WITH ZENER DIODE REFERENCE
OSC 1 40
OSC 2 39
OSC 3 38
TEST 37
REF HI 36
REF LO 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V - 26
G2 25
C3 24
A3 23
G3 22
BP/GND 21
TO PIN 1
100kΩ
100pF
SET VREF
= 100mV
0.1µF
25kΩ 24kΩ
0.047µF
470kΩ
1MΩ
0.01µF
V+
+
IN
-
0.22µF
V-
TO DISPLAY
OSC 1 40
OSC 2 39
OSC 3 38
TEST 37
REF HI 36
REF LO 35
CREF 34
CREF 33
COMMON 32
IN HI 31
IN LO 30
A-Z 29
BUFF 28
INT 27
V - 26
G2 25
C3 24
A3 23
G3 22
GND 21
TO PIN 1
100kΩ
100pF
SET VREF
= 100mV
0.1µF
1kΩ 10kΩ 15kΩ
+5V
1.2V (ICL8069)
1MΩ
+
0.47µF
47kΩ
0.01µF
IN
-
0.22µF
TO DISPLAY
An external reference must be used in this application, since the
voltage between V+ and V- is insufficient for correct operation of the
internal reference.
FIGURE 15. WS7106 AND WS7107; RECOMMENDED
COMPONENT VALUES FOR 2V FULL SCALE
FIGURE 16. WS7107 OPERATED FROM SINGLE +5V
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet WS7107CPL.PDF ] | |
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