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PDF WS57C128FB-35 Data sheet ( Hoja de datos )

Número de pieza WS57C128FB-35
Descripción HIGH SPEED 16K x 8 CMOS EPROM
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! WS57C128FB-35 Hoja de datos, Descripción, Manual

WS57C128FB
HIGH SPEED 16K x 8 CMOS EPROM
Very Fast Access Time
— 35 ns
Low Power Consumption
EPI Processing
— Latch-up Immunity Up to 200 mA
KEY FEATURES
Standard EPROM Pinout
DIP and Surface Mount Packaging
Available
GENERAL DESCRIPTION
The WS57C128FB is a High Performance 128K UV Erasable Electrically Programmable Read Only Memory. It is
manufactured with an advanced CMOS technology which enables it to operate at Bipolar speeds while consuming
only 90 mA.
Two major features of the WS57C128FB are its Low Power and High Speed. These features make it an ideal
solution for applications which require fast access times, low power, and non-volatility. Typical applications include
systems which do not utilize mass storage devices and/or are board space limited.
The WS57C128FB is configured in the standard EPROM pinout which provides an easy upgrade path for systems
which are currently using standard EPROMs. The EPROMs are available in both 600 Mil DIP packages, and both
J-leaded and leadless surface mount packages.
MODE SELECTION
PINS
PGM
MODE
Read
X
Output
Disable
X
CE
VI L
X
OE VPP VCC OUTPUTS
VIL VCC VCC DOUT
VIH VCC VCC High Z
Standby
Program
Program
Verify
X VIH X VCC VCC High Z
VIL VIL VIH VPP VCC DIN
VIH VIL VIL VPP VCC DOUT
Program
Inhibit
X VIH X VPP VCC High Z
X can be VIL or VIH.
PIN CONFIGURATION
TOP VIEW
Chip Carrier
CERDIP
A6
4
5
3
2
1
32 31 30
29
A8
A5 6
28 A9
A4 7
27 A11
A3 8
26 NC
A2 9
25 OE
A1 10
24 A10
A0 11
23 CE
NC 12
22 O7
O0 13
21 O6
14 15 16 17 18 19 20
O1 O2 NC O3 O4 O5
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 PGM
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 O7
18 O6
17 O5
16 O4
15 O3
PRODUCT SELECTION GUIDE
PARAMETER
WS57C128FB-35 WS57C128FB-45 WS57C128FB-55 WS57C128FB-70
Address Access Time (Max)
35 ns
45 ns
55 ns
70 ns
Chip Select Time (Max)
35 ns
45 ns
55 ns
70 ns
Output Enable Time (Max)
20 ns
25 ns
25 ns
25 ns
Return to Main Menu
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1 page




WS57C128FB-35 pdf
WS57C128FB
ORDERING INFORMATION
PART NUMBER
SPEED
(ns)
PACKAGE
TYPE
PACKAGE
DRAWING
OPERATING
TEMPERATURE
RANGE
WSI
MANUFACTURING
PROCEDURE
WS57C128FB-35D
35 28 Pin CERDIP, 0.6"
WS57C128FB-45D
45 28 Pin CERDIP, 0.6"
WS57C128FB-45DMB 45 28 Pin CERDIP, 0.6"
WS57C128FB-45J
45 32 Pin PLDCC
WS57C128FB-45L
45 32 Pin CLDCC
WS57C128FB-55CMB 55 32 Pad CLLCC
WS57C128FB-55D
55 28 Pin CERDIP, 0.6"
WS57C128FB-55DMB 55 28 Pin CERDIP, 0.6"
WS57C128FB-70D
70 28 Pin CERDIP, 0.6"
WS57C128FB-70DM
70 28 Pin CERDIP, 0.6"
WS57C128FB-70DMB 70 28 Pin CERDIP, 0.6"
D2
D2
D2
J4
L3
C2
D2
D2
D2
D2
D2
Comm'l
Comm'l
Military
Comm'l
Comm'l
Military
Comm'l
Military
Comm'l
Military
Military
Standard
Standard
MIL-STD-883C
Standard
Standard
MIL-STD-883C
Standard
MIL-STD-883C
Standard
Standard
MIL-STD-883C
NOTE: 12. The actual part marking will not include the initials "WS."
PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS
The WS57C128FB is programmed using Algorithm D shown on page 5-9.
REFER TO
PAGE 5-1
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