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PDF WS27C010L-12CMB Data sheet ( Hoja de datos )

Número de pieza WS27C010L-12CMB
Descripción Military 128K x 8 CMOS EPROM
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! WS27C010L-12CMB Hoja de datos, Descripción, Manual

WS27C010L
Military 128K x 8 CMOS EPROM
High Performance CMOS
— 90 ns Access Time
Fast Programming
EPI Processing
— Latch-Up Immunity to 200 mA
— ESD Protection Exceeds 2000 Volts
KEY FEATURES
DESC SMD No. 5962-89614
Compatible with JEDEC 27010 and
27C010 EPROMs
JEDEC Standard Pin Configuration
— 32 Pin CERDIP Package
— 32 Pin Leadless Chip Carrier (CLLCC)
GENERAL DESCRIPTION
The WS27C010L is a performance oriented 1 Meg UV Erasable Electrically Programmable Read Only Memory
organized as 128K words x 8 bits/word. It is manufactured using an advanced CMOS technology which enables it to
operate at data access times as fast as 120 nsecs. The memory was designed utilizing WSI's patented self-aligned
split gate EPROM cell, resulting in a low power device with a very cost effective die size.
The WS27C010L 1 Meg EPROM provides extensive code store capacity for microprocessor, DSP, and
microcontroller-based systems. Its 120 nsec access time over the full Military temperature range provides the
potential of no-wait state operation. And where this parameter is important, the WS27C010L provides the user with
a very fast 35 nsec TOE output enable time.
The WS27C010L is offered in both a 32 pin 600 mil CERDIP, and a 32 pad Ceramic Leadless Chip Carrier
(CLLCC) for surface mount applications. Its standard JEDEC EPROM pinouts provide for automatic upgrade
density paths for existing 128K and 256K EPROM users.
PIN CONFIGURATION
Chip Carrier
TOP VIEW
CERDIP
A7
4
5
3
2
1
32 31 30
29
A14
A6 6
28 A13
A5 7
27 A8
A4 8
26 A9
A3 9
25 A11
A2 10
24 OE
A1 11
23 A10
A0 12
22 CE
O0 13
21 O7
14 15 16 17 18 19 20
O1 O2 O3 O4 O5 O6
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 PGM
30 NC
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 O7
20 O6
19 O5
18 O4
17 O3
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
Chip Select Time (Max)
Output Enable Time (Max)
27C010L-90
90 ns
90 ns
35 ns
27C010L-12
120 ns
120 ns
35 ns
27C010L-15
150 ns
150 ns
40 ns
27C010L-17
170 ns
170 ns
40 ns
27C010L-20
200 ns
200 ns
40 ns
Return to Main Menu
4-25

1 page




WS27C010L-12CMB pdf
WS27C010L
MODE SELECTION
The modes of operation of the WS27C010L are listed below. A single 5 V power supply is required in the read
mode. All inputs are TTL levels except for VPP and A9 for device signature.
MODE
PINS
CE
OE PGM A9
A0 VPP VCC OUTPUTS
Read
VIL VIL X(11) X X X 5.0 V DOUT
Output Disable
X VIH X X X X 5.0 V High Z
Standby
VIH X X X X X 5.0 V High Z
Programming
VIL VIH VIL
X
X VPP(12) 6.0 V
DIN
Program Verify
VIL VIL VIH
X
X VPP(12) 6.0 V
DOUT
Program Inhibit
VIH X X X X VPP(12) 5.0 V High Z
Signature
Manufacturer(13)
Device(13)
VIL
VIL
VIL
VIL
X
VH(12)
VIL
X
VH(12)
VIH
X 5.0 V
23 H
X 5.0 V C1 H
NOTES: 11. X can be VIL or VIH.
12. VH = VPP = 12.75 ± 0.25 V.
13. A1 – A8, A10 – A16 = VIL.
ORDERING INFORMATION
PART NUMBER
SPEED
(ns)
WS27C010L-12CMB*
WS27C010L-12DMB*
WS27C010L-15CMB
WS27C010L-15DMB
WS27C010L-17CMB*
WS27C010L-17DMB*
WS27C010L-20CMB*
WS27C010L-20DMB*
120
120
150
150
170
170
200
200
PACKAGE
TYPE
32 Pad CLLCC
32 Pin CERDIP, 0.6"
32 Pad CLLCC
32 Pin CERDIP, 0.6"
32 Pad CLLCC
32 Pin CERDIP, 0.6"
32 Pad CLLCC
32 Pin CERDIP, 0.6"
PACKAGE
DRAWING
OPERATING
TEMPERATURE
RANGE
WSI
MANUFACTURING
PROCEDURE
C2
Military
MIL-STD-883C
D4
Military
MIL-STD-883C
C2
Military
MIL-STD-883C
D4
Military
MIL-STD-883C
C2
Military
MIL-STD-883C
D4
Military
MIL-STD-883C
C2
Military
MIL-STD-883C
D4
Military
MIL-STD-883C
NOTE: 14. The actual part marking will not include the initials "WS."
*SMD product. See page 4-2 for SMD number.
PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS
REFER TO
PAGE 5-1
The WS27C010L is programmed using Algorithm E shown on page 5-11.
(This product can also be programmed by using National Semiconductor's 27C010 Programming Algorithm.)
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