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PDF WM8761 Data sheet ( Hoja de datos )
| Número de pieza | WM8761 | |
| Descripción | 24-BIT 192KHZ STEREO DAC | |
| Fabricantes | Wolfson Microelectronics plc | |
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24-bit 192kHz Stereo DAC
WM8761
DESCRIPTION
The WM8761 is a high performance stereo DAC designed
for audio applications such as DVD, home theatre systems,
and digital TV. The WM8761 supports data input word
lengths from 16 to 24-bits and sampling rates up to 192kHz.
The WM8761 consists of a serial interface port, digital
interpolation filters, multi-bit sigma delta modulators and
stereo DAC in a 14-pin SOIC package.
The WM8761 has a hardware control interface for selection
of audio data interface format, mute and de-emphasis. The
WM8761 supports I2S, right justified or DSP interfaces.
The WM8761 is an ideal device to interface to AC-3,
DTS, and MPEG audio decoders for surround sound
applications, or for use in DVD players, including supporting
the implementation of 2 channels at 192kHz for high-end
DVD-Audio applications.
FEATURES
Stereo DAC
Audio Performance
- 100dB SNR (‘A’ weighted @ 48kHz)
- -90dB THD
DAC Sampling Frequency: 8kHz – 192kHz
Pin Selectable Audio Data Interface Format
- 16 to 24-bit I2S, 24-bit Right Justified or DSP
2.7V - 5.5V Supply Operation
14-pin SOIC Package
Pin Compatible with WM8725 & WM8726
APPLICATIONS
DVD Players
Home Theatre Systems
Digital TV
Digital Set Top Boxes
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
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Production Data, October 2011, Rev 4.6
Copyright 2011 Wolfson Microelectronics plc.
1 page  
WM8761
Production Data
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Supply voltage
Voltage range digital inputs
Master Clock Frequency
Operating temperature range, TA
Storage temperature after soldering
MIN
-0.3V
GND -0.3V
-40C
-65C
MAX
+7V
VDD +0.3V
50MHz
+85C
+150C
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PD, Rev 4.6, October 2011
5
5 Page 
WM8761
Production Data
DEVICE DESCRIPTION
GENERAL INTRODUCTION
The WM8761 is a high performance DAC designed for digital consumer audio applications. The
range of features make it ideally suited for use in DVD players, AV receivers and other consumer
audio equipment.
The WM8761 is a complete 2-channel stereo audio digital-to-analogue converter, including digital
interpolation filter, multi-bit sigma delta with dither, and switched capacitor multi-bit stereo DAC
and output smoothing filters. It is fully compatible and an ideal partner for a range of industry
standard microprocessors, controllers and DSPs. A novel multi bit sigma-delta DAC design is
used, utilising a 128x oversampling rate, to optimise signal to noise performance and offer
increased clock jitter tolerance. (In ‘high-rate’ operation, the oversampling ratio is 64x for system
clocks of 128fs).
Control of internal functionality of the device is provided by hardware control (pin programmed).
Operation using master clocks of 256fs, 512fs or 768fs is provided, selection between clock rates
being automatically controlled. Sample rates (fs) from less than 8kHz to 96kHz are allowed,
provided the appropriate system clock is input. Support is also provided for up to 192kHz using a
master clock of 128fs.
The audio data interface supports 24-bit right justified or 16-24-bit I2S (Philips left justified, one bit
delayed) interface formats. A DSP interface is also supported, enhancing the interface options for
the user.
A single 2.7-5.5V supply may be used, the output amplitude scaling with absolute supply level.
Low supply voltage operation and low current consumption combined with the low pin count small
package make the WM8761 attractive for many consumer applications.
The device is packaged in a small 14-pin SOIC.
DAC CIRCUIT DESCRIPTION
The WM8761 DAC is designed to allow playback of 24-bit PCM audio or similar data with high
resolution and low noise and distortion. Sample rates up to 192kHz may be used, with much lower
sample rates acceptable provided that the ratio of sample rate (LRCIN) to master clock (MCLK) is
maintained at one of the required rates.
The two DACs on the WM8761 are implemented using sigma-delta oversampled conversion
techniques. These require that the PCM samples are digitally filtered and interpolated to generate
a set of samples at a much higher rate than the up to 192kHz input rate. This sample stream is
then digitally modulated to generate a digital pulse stream that is then converted to analogue
signals in a switched capacitor DAC. The advantage of this technique is that the DAC is linearised
using noise shaping techniques, allowing the 24-bit resolution to be met using non-critical
analogue components. A further advantage is that the high sample rate at the DAC output means
that smoothing filters on the output of the DAC need only have fairly crude characteristics in order
to remove the characteristic steps, or images on the output of the DAC. To ensure that generation
of tones characteristic to sigma-delta convertors is not a problem, dithering is used in the digital
modulator along with a higher order modulator. The multi-bit switched capacitor technique used in
the DAC reduces sensitivity to clock jitter, and dramatically reduces out of band noise compared to
switched current or single bit techniques used in other implementations.
The voltage on the CAP pin is used as the reference for the DACs. Therefore the amplitude of the
signals at the DAC outputs will scale with the amplitude of the voltage at the CAP pin. An external
reference could be used to drive into the CAP pin if desired, with a value typically of about mid-rail
ideal for optimum performance.
The outputs of the 2 DACs are buffered out of the device by buffer amplifiers. These amplifiers will
source load currents of several mA and sink current up to 1.5mA allowing significant loads to be
driven. The output source is active and the sink is Class A, i.e. fixed value, so greater loads might
be driven if an external ‘pull-down’ resistor is connected at the output.
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PD, Rev 4.6, October 2011
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet WM8761.PDF ] | |
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