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Número de pieza | WM8737GEFL | |
Descripción | STEREO ADC WITH MICROPHONE PREAMPLIFIER | |
Fabricantes | Wolfson Microelectronics plc | |
Logotipo | ||
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WM8737L
Stereo ADC with Microphone Preamplifier
DESCRIPTION
The WM8737L is a low power stereo audio ADC designed
specifically for portable applications such as minidisc and
memory audio / voice recorders.
The device offers three sets of stereo inputs, which can be
configured for line-level signals, for internal or table-top
microphones, or for DC measurement (battery monitor). A
programmable gain amplifier can be used for automatic
level control (ALC) with user programmable hold, attack and
decay times. The device also has a selectable high pass
filter to remove residual DC offsets.
If the signal source is mono, the WM8737L can run in mono
mode, saving power. It can also mix two channels to mono,
either in the analogue or the digital domain.
Master or slave mode clocking schemes are offered. Stereo
24-bit multi-bit sigma-delta ADCs are used with digital audio
output word lengths from 16-32 bits, and sampling rates
from 8kHz to 96kHz supported.
The device is controlled via a 2 or 3 wire serial interface.
The interface provides access to all features including gain
controls, analogue or digital mono mixing, and power
management facilities. The device is supplied in a leadless
5x5mm QFN package.
FEATURES
• SNR 97dB (‘A’ weighted @ 3.3V, 48kHz, normal power
mode)
• THD –85dB (at –1dB, 3.3V, normal power mode)
• Complete Stereo / Mono Microphone Interface
- Programmable microphone preamp
- Automatic Level Control
- Low-noise microphone bias voltage
• Configurable Power / Performance
• Low Power Mode
- 8.5mW at AVDD = 1.8V (stereo, mic preamps off)
- 20mW at AVDD = 3.3V (stereo, mic preamps off)
• Low Supply Voltages
- Analogue 1.8V to 3.6V
- Digital core: 1.42V to 3.6V
- Digital I/O: 1.8V to 3.6V
• 256fs / 384fs or USB master clock rates: 12MHz, 24MHz
• Audio sample rates: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1,
48, 88.2, 96kHz generated internally from master clock
• 32-pin QFN package, 5 x 5 x 0.9mm
APPLICATIONS
• Memory Audio / Voice Recorders
• Minidisc Recorders
• Portable Digital Music Systems
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
www.wolfsonmicro.com
Advanced Information, May 2004, Rev 3.0
Copyright 2004 Wolfson Microelectronics plc
1 page Preliminary Technical Data
WM8737L
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically
susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling
and storage of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
CONDITION
Supply voltages
Voltage range digital inputs
Voltage range analogue inputs
Voltage range LACIN, RACIN, LACOUT, RACOUT, MICBIAS
Master Clock Frequency
Operating temperature range, TA
Storage temperature after soldering
MIN
-0.3V
DGND -0.3V
AGND -0.3V
AGND -0.3V
-25°C
-65°C
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other.
2. All digital and analogue supplies are completely independent from each other.
MAX
+3.63V
DBVDD +0.3V
AVDD +0.3V
MVDD +0.3V
40MHz
+85°C
+150°C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Digital supply range (Core)
Digital supply range (I/O Buffers)
Analogue supplies range
Ground
SYMBOL
DCVDD
DBVDD
AVDD, MVDD
DGND, AGND
TEST CONDITIONS
MIN
1.42
1.8
1.8
TYP MAX UNIT
3.6 V
3.6 V
3.6 V
0V
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AI Rev 3.0 May 2004
5
5 Page Preliminary Technical Data
SIGNAL TIMING REQUIREMENTS
SYSTEM CLOCK TIMING
MCLK
tMCLKL
tMCLKH
tMCLKY
WM8737L
Figure 1 System Clock Timing Requirements
Test Conditions
DBVDD = 3.3V, DCVDD = 1.42 to 3.6V, DGND = 0V, TA = +25oC, Slave Mode fs = 48kHz, MCLK = 256fs, 24-bit data, unless
otherwise stated.
PARAMETER
System Clock Timing Information
MCLK System clock pulse width high
MCLK System clock pulse width low
MCLK System clock cycle time
SYMBOL
TMCLKL
TMCLKH
TMCLKY
MIN TYP MAX UNIT
13 ns
13 ns
26 ns
AUDIO INTERFACE TIMING – MASTER MODE
BCLK
(Output)
ADCLRC
(Output)
ADCDAT
tDL
tDDA
Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)
Test Conditions
DBVDD = 3.3V, DCVDD = 1.42 to 3.6V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data, unless
otherwise stated.
PARAMETER
Audio Data Input Timing Information
ADCLRC propagation delay from BCLK falling edge
ADCDAT propagation delay from BCLK falling edge
SYMBOL
tDL
tDDA
MIN TYP MAX UNIT
0 10 ns
0 10 ns
AUDIO INTERFACE TIMING – SLAVE MODE
BCLK
tBCH
tBCL
tBCY
ADCLRC
ADCDAT
tDD tLRH
tLRSU
Figure 3 Digital Audio Data Timing – Slave Mode
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AI Rev 3.0 May 2004
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet WM8737GEFL.PDF ] |
Número de pieza | Descripción | Fabricantes |
WM8737GEFL | STEREO ADC WITH MICROPHONE PREAMPLIFIER | Wolfson Microelectronics plc |
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