PDF W83194R-KX Data sheet ( Hoja de datos )

Número de pieza	W83194R-KX
Descripción	133MHZ 3-DIMM K7 CLOCK
Fabricantes	Winbond
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No Preview Available ! W83194R-KX 133MHZ 3-DIMM K7 CLOCK 1.0 GENERAL DESCRIPTION The W83194R-KX is a clock generator which provides all clocks required for AMD K7 system. W83194R-KX provides one differential pair CPU clock open drain outputs up to 143MHz which are externally selectable with smooth transitions. W83194R-KX also provides 6 PCI clocks and 13 SDRAM clocks controlled by the none-delay buffer_in pin. The W83194R-KX accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. Spread spectrum built in at ±0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency selection through I2C interface. The device meets the Pentium power-up stabilization, which requires CPU and PCI clocks be stable within 2 ms after power-up. High drive six PCI and thirteen SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30 pF loads. Two CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads, when maintaining 50± 5% duty cycle. The fixed frequency outputs, such as REF, 24MHz, and 48 MHz provide better than 0.5V /ns slew rate. 2.0 PRODUCT FEATURES • Supports AMD K7 CPU with I2C. • One pair of differential CPU clocks • One chipset clock • 13 SDRAM clocks for 3 DIMMs • 6 PCI synchronous clocks • Optional single or mixed supply: (Vddq3=Vddq2 =3.3V) or (Vddq3 = 3.3V, Vddq2 = 2.5V) • < 250ps skew among CPU clocks • < 250ps skew among PCI clocks • < 5ns propagation delay SDRAM from buffer input • Skew from CPU(earlier) to PCI clock 1.5 to 4ns, center 2.6ns. • Smooth frequency switch with selections from 66.8 MHz to 143 MHz CPU • I2C 2-Wire serial interface and I2C read back • ± 0.25% or ± 0.5% spread spectrum function to reduce EMI • Programmable registers to enable/stop each output and select modes (mode as Tri-state or Normal ) • One 48 MHz for USB & one 24 MHz for super I/O • 48-pin SSOP package Publication Release Date: Nov. 1999 - 1 - Revision 0.35 1 page W83194R-KX 5.3 I2C Control Interface SYMBOL SDATA PIN 23 SDCLK 24 PRELIMINARY I/O FUNCTION I/O Serial data of I2C 2-wire control interface with internal pull-up resistor. IN Serial clock of I2C 2-wire control interface with internal pull-up resistor. 5.4 Fixed Frequency Outputs SYMBOL REF0 / CPU_STOP# PIN 2 REF1 / FS0 48 24_48MHz / FS3 25 48MHz / *FS2 26 I/O FUNCTION I/O 14.318MHz reference clock. This REF output is the stronger buffer for ISA bus loads. Halt CPU clocks at logic 0 level, when input low (In mobile mode. MODE=0) I/O 14.318MHz reference clock. Latched input for FS0 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. I/O 24MHz output clock. Latched input for FS3 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. I/O 48MHz output for USB during normal operation. Latched input for FS2 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. 5.5 Power Pins SYMBOL Vddq2 Vddq3 Vss PIN FUNCTION 42 Power supply for CPU clocks, 2.5V or 3.3V. 1,6,14,19,27,30,36 Power supply for PCI, 24_48MHz, SDRAM[0:12], and CPU PLL core, nominal 3.3V. 3,9,16,22,33,39,45, Circuit Ground. 47 Publication Release Date: Nov. 1999 - 5 - Revision 0.35 5 Page W83194R-KX 8.2.7 Register 6: Winbond Chip ID Register (Read Only) Bit @PowerUp Pin Description 7 0 - Winbond Chip ID 6 1 - Winbond Chip ID 5 0 - Winbond Chip ID 4 1 - Winbond Chip ID 3 0 - Winbond Chip ID 2 1 - Winbond Chip ID 1 1 - Winbond Chip ID 0 1 - Winbond Chip ID PRELIMINARY - 11 - Publication Release Date: Nov. 1999 Revision 0.35 11 Page

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W83194R-KX	133MHZ 3-DIMM K7 CLOCK	Winbond

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