DataSheet.es    


PDF W83194R-17A Data sheet ( Hoja de datos )

Número de pieza W83194R-17A
Descripción 100MHZ AGP CLOCK FOR SIS CHIPSET
Fabricantes Winbond 
Logotipo Winbond Logotipo



Hay una vista previa y un enlace de descarga de W83194R-17A (archivo pdf) en la parte inferior de esta página.


Total 21 Páginas

No Preview Available ! W83194R-17A Hoja de datos, Descripción, Manual

W83194R-17/-17A
1.0 GENERAL DESCRIPTION
100MHZ AGP CLOCK FOR SIS CHIPSET
The W83194R-17/-17A is a Clock Synthesizer which provides all clocks required for high-speed RISC
or CISC microprocessor such as Intel PentiumII, PentiumPro , AMD or Cyrix. Eight different
frequency of CPU, AGP and PCI clocks are externally selectable with smooth transitions. The
W83194R-17/-17A provides AGP clocks especially for clone chipset. The highest CPU frequency
provided by the W83194R-17 is up to 100MHz, but the one of W83194R-17A is up to 133MHz.
The W83193R-17/-17A provides I2C serial bus interface to program the registers to enable or disable
each clock outputs and choose the 0.5% or 1.5% center type spread spectrum to reduce EMI.
The W83194R-17/-17A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V
supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate
into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads
as maintaining 50¡Ó5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz
provide better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
Supports Pentium, PentiumPro, PentiumII, AMD and Cyrix CPUs with I2C.
4 CPU clocks
12 SDRAM clocks for 3 DIMMs
Two AGP clocks
6 PCI synchronous clocks.
Optional single or mixed supply:
(Vdd = Vddq3 = Vddq2 = Vddq2b = 3.3V) or (Vdd =Vddq2 = Vddq3 = 3.3V, Vddq2b = 2.5V)
Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns, AGP to CPU sync. skew 0 ns (250 ps)
Smooth frequency switch with selections from 60 MHz to 133 MHz CPU
I2C 2-Wire serial interface and I2C read back
¡Ó0.5% or ¡Ó1.5% center type spread spectrum function to reduce EMI
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
MODE pin for power Management
48 MHz for USB
24 MHz for super I/O
48-pin SSOP package
Publication Release Date: Sep. 1998
- 1 - Revision 0.20

1 page




W83194R-17A pdf
W83194R-17/-17A
5.5 Power Pins
SYMBOL
Vdd
Vddq2
Vddq2b
Vddq3
Vss
PRELIMINARY
PIN
1
42
48
6,14,19, 30, 36
3,9,16,22,27,
33,39,45
FUNCTION
Power supply for REF0 crystal and core logic.
Power supply for AGP1, REF1either 2.5V or 3.3V.
Power supply for CPUCLK[0:3], either 2.5V or 3.3V
Power supply for SDRAM, PCICLK and 48/24MHz
outputs.
Circuit Ground.
6.0 FREQUENCY SELECTION
6.1 W83194R-17 FREQUECY TABLE
FS2 FS1 FS0 CPU,SDRAM PCI (MHz) AGP (MHz) REF (MHz)
(MHz)
000
60
30 60
14.318
001
66.8 33.4 66.8 14.318
010
68.5
34.25
68.5
14.318
011
75
37.5 75
14.318
100
75
32 64
14.318
101
83.3 33.3 66.6 14.318
110
90
30 60
14.318
111
100
33.3 66.6
14.318
6.2 W83194R-17A FREQUECY TABLE
FS2 FS1 FS0 CPU,SDRAM
(MHz)
000
112
001
66.8
010
124
011
75
100
133.3
101
83.3
110
95.25
111
100.2
PCI (MHz) AGP (MHz)
37.3
33.4
31
37.5
33.3
33.3
31.75
33.4
74.7
66.8
62
75
66.6
66.6
63.5
66.8
REF (MHz)
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
Publication Release Date: Sep. 1998
- 5 - Revision 0.20

5 Page





W83194R-17A arduino
W83194R-17/-17A
PRELIMINARY
8.3.5 Register 4: Additional SDRAM Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7 x - Reserved
6 x - Reserved
5 x - Reserved
4 x - Reserved
3 1 17 SDRAM11 (Active / Inactive)
2 1 18 SDRAM10 (Active / Inactive)
1 1 20 SDRAM9 (Active / Inactive)
0 1 21 SDRAM8 (Active / Inactive)
8.3.6 Register 5: Peripheral Control (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7 x - Reserved
6 x - Reserved
5 x - Reserved
4 1 47 AGP1 (Active / Inactive)
3 x - Reserved
2 x - Reserved
1 1 46 REF1 (Active / Inactive)
0 1 2 REF0 (Active / Inactive)
8.3.7 Register 6: Reserved Register
Bit @PowerUp Pin
7 x - Reserved
6 x - Reserved
5 x - Reserved
4 x - Reserved
3 x - Reserved
2 x - Reserved
1 x - Reserved
0 x - Reserved
Description
- 11 -
Publication Release Date: Sep. 1998
Revision 0.20

11 Page







PáginasTotal 21 Páginas
PDF Descargar[ Datasheet W83194R-17A.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
W83194R-17100MHZ AGP CLOCK FOR SIS CHIPSETWinbond
Winbond
W83194R-17A100MHZ AGP CLOCK FOR SIS CHIPSETWinbond
Winbond

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar